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TLM Convenience Socket

TLM Convenience Socket. Parvinder Pal Singh Girish Verma. Presentation Topics. Brief note on OSCI TLM2.0 Challenges in TLM2.0 Features provided by Convenience Layer Convenience Socket Modeling. Brief ON OSCI TLM2.0. 1. Core Interfaces and TLM2 Sockets.

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TLM Convenience Socket

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  1. TLM Convenience Socket Parvinder Pal SinghGirishVerma

  2. Presentation Topics • Brief note on OSCI TLM2.0 • Challenges in TLM2.0 • Features provided by Convenience Layer • Convenience Socket Modeling

  3. Brief ON OSCI TLM2.0 1. Core Interfaces and TLM2 Sockets nb_transport_bw (TRANS, phase, time) Target Initiator 2. Generic payload b_transport (TRANS, time) Command Address Data Byte enables Response status nb_transport_fw (TRANS, phase, time) Extensions

  4. Brief ON OSCI TLM2.0 Approximately-Timed Modeling Loosely – Timed Modeling b_transportns) Call Return BEGIN_REQ MASTER SLAVE MASTER SLAVE END_REQ BEGIN_RESP END_RESP

  5. Extending Base TLM2.0 BEGIN_REQ GENERIC PAYLOAD • To get more timing information • To Extend Generic structure to protocol specific END_REQ Payload With Extensions BEGIN_DATA END_DATA ProtocolSpecificExtensions BEGIN_RESP END_RESP

  6. Challenges in TLM2.0 • Implementing State Machine • Writing FSM for every IP makes it difficult for IP developer • Managing TRANSbecomes complex • Managing TRANS field settings gets tough • Compile time Fixing of BUSWIDTH • Addition and Deletion of Protocol Specific Extensions to GP • Managing the extensions that already have been added to GP

  7. Features of Conv’ Layer • various abstraction levels supported • Memory management for TRANS and its extensions • Support to VCD TRACE for trans and its extensions • Support to Statistics Collection • Bus protocol independent APIs and callbacks • One time information for GP extension Phase • Bus-Width Configuration

  8. Abstraction Levels • Support various Abstraction Level • For e.g. OCP-IP define 4 level • TL4, TL3, TL2, TL1 • Run-time configuration of abstraction level of a transaction Simulation in progress Slave also configures itself for abstraction level communicated through master b_transport Abstraction Level Change request

  9. Memory Management • No NEED for managing TRANS and its extensions • Configures memory manager to provide data and byte enable pointers • Configures the number of transactions that are outstanding at any given time by restricting TRANS Memory Manager Pool For TRANS Pool For Data array Pool For be array Master Pool For Extension Process Transaction

  10. VCD Trace and Statistics • Tracing at all abstraction levels • Tracing of GP fields, extensions and phases • Contains information like • Number of phases sent • Number of transaction types sent • Number of bytes sent, etc. • Provides statistics for a SOCKET

  11. Protocol Independent APIs Register API for Invalidating DMI API to set trace file Reset Debug Dmi Read write blocking Read write Non blocking get trans b/nb MASTER Register to get write handler Register to get read handler Register debug Register DMI Register Reset Invalidate DMI SLAVE

  12. Callbacks • Provides the option whether or not to have callbacks • Provides the timing information Status read_data(fn_ptrresume_txn, trans, offset, size, request_level) Status write_data(fn_ptrresume_txn, trans, offset, size, request_level) Status write_status(fn_ptrresume_txn, trans) MASTER Status accept_command(fn_ptr accepted, trans) Status read_data(fn_ptrresume_txn, trans, offset, size, request_level) Status write_data(fn_ptrresume_txn, trans, offset, size, request_level) Status write_status(fn_ptrresume_txn, trans) SLAVE

  13. TL4Abstraction Level Transaction Queue read_nb() • b_transport b_transport() get_read_handler() write_nb() accept_command() read_nb() read_data() read_data() read_data() MASTER Master Convenience Slave Convenience SLAVE

  14. TL1 Abstraction Level write_b() BEGIN_REQ get_write_handler() accept_command() END_REQ phase1 Write_data phase2 Write_data BEGIN_RESP Write_Resp END_RESP SLAVE MASTER M Conven. S Conven

  15. Bus-Width Configuration • TLM2 checks bus-width at compile time • Convenience layer allows the bus-width configuration until BEOE phase • Configure a new Bus-width pair without any re-compilation of the application convenience_initiator_socket<0> m_socket; convenience_target_socket<0> s_socket Elaboration and beoe phase Mismatch Stop Simulation Buswidth Configuration b_transport EOE phase Return if BW matches

  16. TLM2.0 Structure Abstract API for FSM IMPLEMENTATION Memory Manager Configurable Param Protocol Specific Implementation TLM 2.0 Core Interfaces and Generic Payload API to Add Phases And Extension • Convenience Layer Generic API and Callbacks USER IP MODEL

  17. Pseudo-Code • structbus_protocol_type • { • typedefmemory_manager mm; • typedeffsm_factoryfactory_class; • typedef extension extension_class; • typedefconvenience_config_paramconfig_param; • }; • template <uint32_t BUSWIDTH = 0, • typename TYPES = bus_protocol_type> • classconvenience_initiator_socket: publictransport_initiator_socket <BUSWIDTH, • typename TYPES::mm, • typename TYPES::extension_class>, • public TYPES::config_param

  18. Thank You!!

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