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Understanding the Five Steps of Instruction Execution in Computer Architecture

This document outlines the five fundamental steps of instruction execution in computer systems as taught in Comp.120, Fall 2005. The process begins with Instruction Fetch using the Program Counter (PC), followed by Instruction Decode and Register Fetch. It then describes the execution phase, detailing various actions like memory address computation and R-type instruction completion. Finally, it concludes with memory read completion. These steps illustrate the complex interactions in the CPU and the FSM's role in managing these operations efficiently.

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Understanding the Five Steps of Instruction Execution in Computer Architecture

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  1. 26 October • Questions? • Instruction Execution Comp 120 Fall 2005

  2. Five Execution Steps • Instruction Fetch • Instruction Decode and Register Fetch • Execution, Memory Address Computation, or Branch Completion • Memory Access or R-type instruction completion • Memory Read Completion INSTRUCTIONS TAKE FROM 3 - 5 CYCLES! • A FSM looks at the op-code to determine how many... Comp 120 Fall 2005

  3. Step 1: Instruction Fetch • Use PC to get instruction and put it in the Instruction Register. • Increment the PC by 4 and put the result back in the PC. • Can be described succinctly using RTL "Register-Transfer Language" IR = Memory[PC]; IR is “Instruction Register” PC = PC + 4;What is the advantage of updating the PC now? Comp 120 Fall 2005

  4. Step 2: Instruction Decode and Register Fetch • Read registers rs and rt in case we need them • Compute the branch address in case the instruction is a branch • RTL: A = Reg[IR[25-21]]; B = Reg[IR[20-16]]; ALUOut = PC + (sign-extend(IR[15-0]) << 2); • We aren't setting any control lines based on the instruction type (we are busy "decoding" it in our control logic) Comp 120 Fall 2005

  5. Step 3 (instruction dependent) • ALU is performing one of three functions, based on instruction type • Memory Reference: ALUOut = A + sign-extend(IR[15-0]); • R-type: ALUOut = A op B; • Branch: if (A==B) PC = ALUOut; Comp 120 Fall 2005

  6. Step 4 (R-type or memory-access) • Loads and stores access memory MDR = Memory[ALUOut]; MDR is Memory Data Register or Memory[ALUOut] = B; • R-type instructions finish Reg[IR[15-11]] = ALUOut; Comp 120 Fall 2005

  7. Step 5 Memory Read Completion • Reg[IR[20-16]]= MDR; Comp 120 Fall 2005

  8. Summary: Comp 120 Fall 2005

  9. Data Path with Control (5.28) Comp 120 Fall 2005

  10. FSM Control (5.31) Comp 120 Fall 2005

  11. IFetch and Decode (5.32) Comp 120 Fall 2005

  12. Memory Ref (5.33) Comp 120 Fall 2005

  13. R-type (5.34) Comp 120 Fall 2005

  14. Branch (5.35) Comp 120 Fall 2005

  15. Jump (5.36) Comp 120 Fall 2005

  16. Full State Diagram Comp 120 Fall 2005

  17. FSM Comp 120 Fall 2005

  18. Highlight • Who’s been to the fair? • Go! • You can have your picture taken with W! Comp 120 Fall 2005

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