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Chapter 8 Computer Arithmetic

Chapter 8 Computer Arithmetic. Chapter Outline. Unsigned notations Signed notations Binary Coded Decimal Specialized arithmetic hardware Floating point numbers IEEE 754 floating point standard. Unsigned Notations. Unsigned non-negative Unsigned two ’ s-complement. Unsigned Notations.

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Chapter 8 Computer Arithmetic

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  1. Chapter 8Computer Arithmetic

  2. Chapter Outline • Unsigned notations • Signed notations • Binary Coded Decimal • Specialized arithmetic hardware • Floating point numbers • IEEE 754 floating point standard

  3. Unsigned Notations • Unsigned non-negative • Unsigned two’s-complement

  4. Unsigned Notations • Unsigned non-negative • Unsigned two’s-complement

  5. Addition: X  X + Y

  6. Overflow

  7. Subtraction: X  X - Y

  8. Overflow

  9. Multiplication • A non-optimal method z = 0 FOR i = 1 TO y DO { z = z + x }

  10. Multiplication • A more typical method

  11. Multiplication • Calculating running totals

  12. Multiplication • Shifting partial results to align sums

  13. Shift-add Multiplication Algorithm C = 0, U = 0;

  14. Example: UV  X  Y(X = 1101, Y = 1001) C = 0, U = 0 0

  15. RTL Code C  0, U  0, i  n

  16. Example: UV  X  Y(X = 1101, Y = 1001) 0 C  0, U  0, i  4

  17. Hardware Implementation

  18. Optimizing the RTL Code • UV  X  V • Register Y not needed • One operand is lost

  19. Optimizing the RTL Code C  0, U  0

  20. Example 0 C  0, U  0, i  4

  21. Booth’s Algorithm • Multiplying unsigned 2’s-complement numbers

  22. Example • UV  X  Y, X = -3 (1101), Y = -5 (1011)

  23. Example • UV  X  Y, X = -3 (1101), Y = -5 (1011)

  24. RTL Code

  25. Example

  26. Optimized RTL Code

  27. Hardware Implementation

  28. Division • A non-optimal method

  29. Division • A more typical method

  30. Division • Shifting results to align remainders

  31. Shift-subtract Division Algorithm

  32. Example: UV  X(UV = 1001 0011, X = 1101)

  33. RTL Code

  34. Example

  35. Hardware Implementation

  36. Restoring Division Algorithm

  37. Overflow Comparison

  38. Example

  39. RTL Code

  40. Example

  41. Hardware Implementation

  42. Signed Notations • Signed-magnitude

  43. Signed Notations • Signed-magnitude • Signed-2’s complement

  44. Signed Notations • Signed-magnitude • Signed-2’s complement • Value Signed-magnitude Signed-2’s complement • +3 0 0011 0 0011 • -3 1 0011 1 1101

  45. Addition and Subtraction

  46. RTL Code

  47. RTL Code

  48. Examples

  49. Examples

  50. Examples

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