1 / 12

2011 Symposium on VLSI Circuits Kyoto, Japan June 14-17, 2011

2011 Symposium on VLSI Circuits Kyoto, Japan June 14-17, 2011. SSCS Meetings Committee Aug 15, 2011 – Boston, MA. Symposium on VLSI Circuits. 2011 Symposium hosted by JSAP

pier
Télécharger la présentation

2011 Symposium on VLSI Circuits Kyoto, Japan June 14-17, 2011

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. 2011 Symposium on VLSI CircuitsKyoto, JapanJune 14-17, 2011 SSCS Meetings Committee Aug 15, 2011– Boston, MA 2011 VLSI Symposium Kyoto, Japan

  2. Symposium on VLSI Circuits • 2011 Symposium hosted by JSAP • Extremely strong commitment by JFE committee/leadership with help from NAE and SSCS to overcome the adversity of the March tsunami with a very successful (high quality papers & attendance) symposium • Continued with two days of overlap. • Royal Rhiga– Kyoto - June 14-17, 2011 • 2011/2012 NAE General Chair – Ajith Amerasekera • 2011/2012 NAE TPC Chair – Vivek De • The paper submission date was moved to Jan. 24 to give authors more time after the New Year. • 2011: paper selection was decoupled from ISSCC and joint with Technology Program Committee • 2012 Symposium to be hosted by IEEE • Hilton Hawaiian Village – Honolulu – June 12-15, 2012 • Leverage Technology/Circuit topics with 2-day overlap 2011 VLSI Symposium Kyoto, Japan

  3. Circuits Submission & Acceptance 410 412 409 409 400 +31% 350 343 313 329 +32% 300 259 250 +26% 224 206 200 Submission +35% 153 150 115 113 100 110 108 Accept 103 92 84 84 92 77 76 50 20% 35% 28% 34% 27% 30% 50% 38% 38% 33% 22% 0 ’06 ’10 ’03 ’04 ’05 '01 ’02 ’08 ’07 ’09 ’11 2011 VLSI Symposium Kyoto, Japan

  4. Attendees, Program/Short Course 2011 VLSI Symposium Kyoto, Japan

  5. Ckts. Submission: Industry/Academia # of papers submitted from industry # of papers submitted from academia # of submitted papers 2011 VLSI Symposium Kyoto, Japan

  6. Ckts. Accepted: Industry/Academia Industry accepted papers: 49 (42.6%) including co-authored by industry with academia 8 (7%)Academia accepted papers: 66 (57.4%) including co-authored by academia with industry 15 (13%) Ratio of industry to total (%) 2000 2001 2002 2003 2004 2006 2007 2007 2008 2009 2010 2011 2011 VLSI Symposium Kyoto, Japan

  7. Issues for Discussion • Initiatives to increase attendance • New Joint Committee: Technology/Circuits to solicit papers for planned joint sessions and rump sessions. (e.g. Design Enablement) • New Short Course Committee: Tech/Circ. General Chairs, SC Chairs, and Treasurer – to ensure increased attendance and quality • Marketing: Engaged BtB (IEDM Publicity) 2011 VLSI Symposium – Kyoto, Japan

  8. 2011 VLSI Circuit Symposium Financials 2011 Symposia hosted in Kyoto – Rhiga Royal Hotel Registration Fee (IEEE) - JPY60K (Finances on odd years sponsored by Japan Society of Applied Physics) 2009 & 2011 Honolulu $11K surplus for Circuits Symposia in 2010 vs. $9.6K in ’08 Requesting 40K in each of 2011 and 2012 for advance. Current Budgeting for 2012: Registration 277 vs. 277 (2010) Short Course 85 vs. 85 (2010) Registration Fee $575 vs. $550 (2010) 2011 VLSI Symposium Kyoto, Japan

  9. Summary 2011 VLSI Symposium Kyoto, Japan

  10. EXTRA SLIDES 2010 VLSI Symposium – Honolulu, HI

  11. Summary • Attendance ~276(313)/85(130); target 300/90; overlap with DAC could have affected attendance by ~10%. • Moved out final paper submission by 2 weeks and reduced 4 weeks between paper selection and conference. • No change in # of submitted papers or quality of papers – trends matched for Hawaii; shorter time is good, tight for deliverables • Seeing more joint University/Industry papers; may need to classify level of industry contribution. • Good increase in digital papers. Higher attendance at digital. • Could do more to leverage Technology/Circuits overlap. Mixed sessions? • Need to address more complex SoC, and application technology; e.g. power delivery and management, sensor interfaces, display circuits, control circuits, embedded processing. Should we consider a circuits applications category and solicit? 2010 VLSI Symposium – Honolulu, HI

  12. Peer Review Process • 409 papers submitted this year. • All papers sent to all committee members. • Papers are divided into 11 categories. • Each committee member are responsible for 5 categories. • Each paper has 10 reviews. • Each committee member reviews 200 papers. 2010 VLSI Symposium – Honolulu, HI

More Related