1 / 54

Advances in AAA

Advances in AAA. Yves SOREL AOSTE team - INRIA Rocquencourt www.syndex.org. Outline. Distributed scheduling of systems with multiple real-time constraints Conditioning Scilab/Scicos and SynDEx coupling Planned new functionalities in SynDEx References. RTE systems characteristics.

Télécharger la présentation

Advances in AAA

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Advances in AAA Yves SOREL AOSTE team - INRIA Rocquencourt www.syndex.org

  2. Outline • Distributed scheduling of systems with multiple real-time constraints • Conditioning • Scilab/Scicos and SynDEx coupling • Planned new functionalities in SynDEx • References

  3. RTE systems characteristics • Functionalities: Automatic Control, Signal & Image Processing algorithms • Reactive: Stimulus event - Operations – Reaction event • Real-Time: Constraints: Latency = bounded Reaction Time Cadence = bounded Input Rate • Distributed:Power,Modularity, Wires minimizationHeterogeneous Multicomponent Architecture • Network of Processors andSpecific Integrated Circuits • Specific Integrated Circuits = ASIC, ASIP, FPGA, IP • Embedded: Resources minimization

  4. Algorithm-architecture adequation (AAA) • Global approachbased on the Synchronous Languages Semantics and the hardware RTL models • Unified Model: Directed graphs • Algorithm: Operation / Data-Conditioning Dependence • Architecture: FSM / Connection • Implementation: distribution and scheduling through graphs Transformations • Adequation: Optimized Implementation (best matching) • Macro-Generation: • Real-Time Executives for Multicomponent • Structural VHDL for Integrated CircuitSynthesis

  5. Choice in scheduling and potential paralellism Typical model: precedence constraints B A D C Task Precedence Directed Acyclic Graph (DAG)

  6. Typical model: real-time constraints r1 r2 T T s1 s2 • Computation time: C • Deadline: D D2 D1 C C • Period: T • Release time: r • Start time: s

  7. State of art: tasks with periodicity constraints Processors / Characteristics / Goal • 1 / T = D / - RMS : optimal for static assignment • 1 / T D / - DM : optimal for dynamic assigment • 1 / T  D, r / - NP-hard (non-preemptive) • m / T = D / - sufficient and necessary condition • m / T D / - NP-hard • m / strict T / - NP-hard (non-preemptive)

  8. State of art: tasks with precedence constraints • 1 / prec, D / min Lmax EDD – optimal • 1 / prec / fmax Lawler – optimal • 1 / prec, r, D / - NP-hard • 1 / prec, r / fmax Baker – O(n2 ) (preemptive) • 1 / prec, r / min Lmax NP-hard • 1 / sA-sB < aAB / min schedule

  9. Tasks with precedence & periodicity constraints • 1 / r, D const. partial order, T / - modified EDF • 1 / prec-subtasks /- schedulability condition • 1 / T, prec for sporadic tasks / - schedulability test • m / T / minimize communications • m / T, D- tasks ; T, D, prec-subtasks/ -

  10. Model and problem to solve • Reactive systems • Typical vs. new model • Repetitive graph: strict periodicity, non preemptive • Latency: new constraint • Problem to solve

  11. Reactive systems stimulus System of operations reaction period stimulus time reaction time latency Extended to each operation and each pair of operations

  12. r1 r2 T T s1 s2 D2 D1 C C s1 s2 T T C C Typical vs. new model Operation instead of task or job to be independent of implementation aspects and to distribute operation onto operator

  13. s1 s2 T T B B C C A A D D E E Periodic operations: Infinite repetitive graph . . . Pattern infinitely repeated

  14. Repetitive graph Infinite and finite repetitive graph A3i+1 A3i-2 C2i+1 C2i-1 A3i+2 B A3i-1 B C2i+2 C2i A3i+3 A3i ith repetition (i+1)th repetition

  15. L L A3i+1 A3i+3 A3i+2 C2i+2 C2i+1 A3i-2 A3i-1 C2i-1 A3i C2i TA TA TA TA TA sC2i-1 – sA3i-1 + CC L sAi+1 – sAi = TA ,  i * I Latency and periodicity constraints B B i th repetition (i+1)th repetition

  16. sAi+1 – sAi = TA ,  i  * I sAi+1 – sAi L – CA,  i * I Relation between periodicity and latency Theorem: the periodicity constraint is a latency constraint =>

  17. Problem to solve • Off-line scheduling • Without preemption • With idle time • Several processors • Precedence constraints • Latency constraints • Periodicity constraints Study for monoprocessor case then results extension for multiprocessor case

  18. Schedulability condition for periodicities Theorems: the scheduling of N operations with whatever periods and execution durations is NP-hard We consider operations with periods and execution durations multiple

  19. A A E E B B F F C C TD =max{TA ,TB ,TC} TD =min{TE ,TF} TD = min{TE ,TF} Schedulability condition for periodicities Theorems: periods inheritance for non periodic operations D

  20. Schedulability condition for periodicities Schedulability condition for periodicities • Theorem: for a system with periodicity and precedence constraints • It exists a hyperperiod from smax to smax +T, where T is the least common multiple of all periodicity constraints • If the system is schedulable then (necessary condition)

  21. Schedulability condition for latencies • Relations between pairs of operations • II: schedulability condition for imposed latencies on pairs of operations which are in relation II • Z: schedulability condition for imposed latencies on pairs of operations which are in relation Z • X: schedulability condition for imposed latencies on pairs of operations which are in relation X • Schedulability condition

  22. A D D G G E F Theorem: the system is schedulable if and only if and Relations between pairs of operations: II A B C H I J (A,C)II(H,J)

  23. A D H G J I Theorem: the system is schedulable if and only if and Relations between pairs of operations: Z A B C D E G F (A,C)Z(D,G)

  24. D A G B C Theorem: the system is schedulable if and only if one of the following relations is satisfied Relations between pairs of operations: X D E F G H A J I (D,G)X(H,J)

  25. and and Schedulability condition for latencies Theorem: the system is schedulable if and only if: • For all pairs (A,C)II(H,J), • For all pairs (A,C)Z(D,G), • For all pairs (D,G)X(Hi,Ji),one of following relations is satisfied:

  26. General schedulability condition • Theorem: for a system with precedence, periodicity and latency constraints • It exists a hyperperiod from smax to smax +T, where T is the least common multiple of all periodicity constraints

  27. General schedulability condition • Theorem: if the system is schedulable then and

  28. Scheduling algorithm • Step 1: Algorithm of latency marking • The mark of an operation is the smallest value of all latency constraints for which there is a path from this operation to the second operation of the latency constraint • Step 2: Scheduling algorithm • Transient: schedules the operations in this order: first, operations without constraint, then operations with mark  0, and finally periodic operations with the smallest period • Permanent: once a periodic operation is scheduled, the order of the scheduling is the opposite order of the initialization order

  29. Scheduling algorithm • Theorem: the scheduling algorithm is optimal (if there is a schedule, the algorithm will find it) • Corollary: by applying the scheduling algorithm from 0 to 2T, we obtain a scheduling test, T is the hyper-period

  30. Repetition t Filtera Filtera Filtera adap adap adap gensig gensig gensig sub sub sub filter filter filter coeff coeff coeff visu visu visu Processor1 Processor2 Processor3 Opr1 Opr2 Opr3 Com1b Com2b Com1a Com2a Com3a Shared Memory Message Passing Com Multipoint Bus/mux/demux/arbiter Opr4 Bus/mux/demux Specific IC Distribution and scheduling for multiprocessor • Scheduling of operations is not sufficient • Distribution of operations onto operators, communication operations due to dependences onto communicators • Distribution and scheduling based on algorithm graph and architecture graph transformations

  31. Precedence and periodicity constraints • Theorem: the distribution and scheduling of N operations onto M operators is NP-hard HEURISTICS

  32. Precedence and periodicity constraints • Heuristic principles • Theorem: If there is a data transfer between two operations then their periods must be equal • Theorem: two operations whose periods are coprime must not be scheduled on the same operator • Operations with periods multiple are scheduled on the same operator as long as an operator is available (take into account communication cost)

  33. Precedence and periodicity constraints

  34. Precedence and latency constraints • Theorem: the distribution and scheduling of N operations onto M operator is NP-hard HEURISTICS

  35. Precedence and latency constraints • Heuristic principles • Exploit the physical parallelism of the architecture and the potential parallelism of operations such that these operations in relation X are scheduled on different operators • Based on the algorithm of latency marking

  36. Precedence periodicity and latency constraints • Theorem: the distribution and scheduling of N operations onto M operator is NP-hard HEURISTICS

  37. Precedence periodicity and latency constraints • Heuristic principles • Mix both previous heuristics • Theorem: two periodic operations with a latency constraint must have the same period

  38. Distribution and scheduling model The set of all possible implementations is described as the composition of three binary relations: (Gal, Gar) (Gal’, Gar’) rout o distrib o sched • Routing: creation of all the inter-operator routes • Distribution: spatialallocation • Partitioningand allocation: operations onto operator • Partitioning of inter-partition edges according to routes • Creationand allocation: • Communication vertices ontocommunicators of the route • Allocation vertices onto memories • Identity vertices ontobus/mux/demux/ with or without arbiter

  39. Distribution and scheduling model • Scheduling: temporal allocation • Partial OrderTotal Order for: • Each partition of operations allocated onto an operator • Each partition of communication operations allocated onto a communicator Routing, Distribution and Scheduling lead to a Partial Order consistent with the initial Partial Order of the Algorithm Graph

  40. Optimization for systems with precedence constraints one latency equal the periodicity • Distributed scheduling lead to NP-hard problems • Heuristics based on scheduling results for monoprocessor such that communication cost is taken into account • Fast: Greedy:list-scheduling for Rapid Prototyping • Slow: Neighboring list-scheduling with back-tracking

  41. Conclusion • New model for systems with multiple real-time constraints • Relations between • Latency and periodicity constraints • Latency constraint and deadline • Monoprocessor • General schedulability condition for precedences, periodicities and latencies • Optimal scheduling algorithm • Multiprocessor • Complexity results • Heuristics for precedence, periodicity, latency constraints • Optimization for precedence, one latency = period • AAA/SynDEx: safe and minimized development cycle

  42. Work in progress • Relaxation of strict periodicity: to increase the scheduling possibilities and consider jitter • Preemption taking into account its cost: Np number of preemtion difficult to calculate, pc cost of a preemption easy to evaluate, global cost = Np x pc • Improvement of heuristics for precedence, periodicity and latency constraints

  43. Conditioning • Necessary for: • alternative executions according to result of a test • combined with delay gives FSM • Extension of the classical data flow model from Dennis (1975) better suited to distribution • condi operation for relaying condition when distributed • condo operation for merging different alternatives • Takes advantage of conditioning hierarchy during distributed macro-code generation

  44. Hierarchy and conditioning Hierarchy Hierarchy + Conditionning

  45. x a*d y b*c det x-y Control flow vs data flow • Control flow • Flow chart approach • Vertex: operation • Edge: execution order • State chart approach • Vertex: state (operation) • Edge: transition (operation) • Total order • Data flow • Vertex: operation • Edge: data dependence • PartielorderPotential Parallelism a d b c x x - det

  46. Control flow (state chart) Sequential State / Transition Data flow Potential parallelism Operations on data Control flow inside data flow for distribution Control oriented algorithms Data oriented algorithms + Multi-formalism Distributed system Translation in data flow

  47. SyncChart to SynDEx translation • Restriction to Pure SyncCharts (boolean signals) • Initial format: XML generated by SyncCharts • Final format: algorithm specification (.sdx) • Step by step translation of the semantics: • Flat automaton • Refinement • Parallelism • Synchronization by local signals • Translation is programmed in O’Caml • PXP package used to parse XML file Concepts shared by all the stateoriented formalisms

  48. Flat automaton Flat automaton without parallelism = Constellation

  49. Parallel and hierarchical automaton

  50. Scilab/Scicos and SynDEx coupling

More Related