1 / 16

Aerospace Testing and Qualification Efforts

Aerospace Testing and Qualification Efforts. Space Qualification Test (RTSX-SU). John Campbell May 11, 2005 (310) 336-1787. Aerospace Efforts. Detail of long term life test Qualification Testing 6000 hour test Antifuse Characterization. Space Qualification Requirements.

rashad-henderson
Télécharger la présentation

Aerospace Testing and Qualification Efforts

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Aerospace Testing and Qualification Efforts Space Qualification Test (RTSX-SU) John Campbell May 11, 2005 (310) 336-1787

  2. Aerospace Efforts • Detail of long term life test • Qualification Testing • 6000 hour test • Antifuse Characterization

  3. Space Qualification Requirements • Characterization – all aspects of the device technology must be evaluated to ensure the process is well controlled, the long term reliability of the product is established, radiation characteristics are identified and overall parametric performance is well defined in terms of margins and areas of concern • CMOS issues well understood • Aerospace concentrating on antifuse lifetime and failure physics • The burn-in boards, ovens, and tester have been characterized to ensure lifetest envelopes, but does not exceed, “user like” space conditions

  4. Space Qual 6000 - Details • 300 RTSX32SUs and 150 RTSX72SUs life-tested for 6000 hrs. • Design based on NASA test design but modified • Half parts at 125º C, other half at –55º C • VCCI=5.0V, VCCA=2.5V, and undershoot less than 1.5V

  5. Space Qual 6000 Design Summary • Utilization Post-Combiner device utilization: SEQUENTIAL Used: 1080 Total: 1080 (100.00%) COMB Used: 1800 Total: 1800 (100.00%) LOGIC Used: 2880 Total: 2880 (100.00%) (seq+comb) IO w/ Clocks Used: 168 Total: 170 (46 CMOS) (47 PCI) (74 TTL) CLOCK Used: 2 Total: 2 HCLOCK Used: 1 Total: 1 • Fan out • 26 nets have fan out of 24 • Timing Analysis • Setup time @ 125C, VCCA=2.25V, VCCI=4.5V, -1 grade • I/O clk max frequency = 67MHz • Array clk max frequency = 85MHz • Hold time @ -55C, VCCA=2.75V, VCCI=5.5V, STD grade • Shortest path has 0.51ns margin

  6. Space Qual 6000 antifuse Utilization F=> 2540 Antifuse between freeway & output track G=> 0 Antifuse between output track & 2nd, 3rd, & 4th freeway on the net H=> 319 Antifuse between two horizontal tracks V=> 76 Antifuse between two vertical tracks W=> 25 Antifuse between horizontal segment & 2nd freeway on the net(old-style freeway) X=> 4873 Antifuse between horizontal segment & freeway B=> 1130 Antifuse between Local Track and input S=> 1332 Antifuse between output track & input(semi-direct) I=> 10006 Antifuse between horizontal segment & input K=> 1572 Antifuse between input & horizontal NCLK0 or NCLK1, or QCLK 21873 Total Dynamic Antifuses J=> 11299 Antifuse between input & horizontal NVCC or NGND M=> 211 Antifuse for I/O configuration options Q=> 8 Silicon Signature afuse in silicon signature words T=> 0 Antifuse between output track & input that is used early in programming sequence to tieoff floating output track Y=> 1836 Antifuse between horizontal segment & vertical NVCC or NGND Z=> 630 Antifuse between freeway & horizontal NVCC or NGND 13984 Total Static Antifuses 35857 Total Antifuses

  7. Space Qual 6000 Top Level Block Diagram

  8. 278 Stage Delay Line

  9. Mux4DelayCell Function Mode 00: Four Inverting Delay Lines O1=!I[1] O2=!I[2] O3=!I[3] O4=!I[4] Mode 01: Four Weaving non-inverting Delay Lines O1=I[3] O2=I[4] O3=I[1] O4=I[2] Mode 10: Four Weaving non-inverting Delay Lines O1=I[2] O2=I[1] O3=I[4] O4=I[3] Mode 11: Four Weaving non-inverting Delay Lines O1=I[4] O2=I[3] O3=I[2] O4=I[1] Fan Out for All inputs is 4

  10. 139 Bit I/O Shift Register

  11. 614 Bit Array Shift Register

  12. Space Qual 6000 Status and Plans • First 150 RTSX32SUs with original UMC programming algorithm in test at 125º C • First 75 RTSX72SUs with original programming at –55º C scheduled for late May • Second 150 RTSX32SUs programmed with UMA and SAL at –55º C scheduled early June • Second 75 RTSX72SUs programmed with UMA and SAL at 125º C scheduled early June

  13. Qual – Status and Plans Summary Actel currently developing schedule Completion expected approximately 5/06

  14. Space Qual Antifuse Characterization • Space programs need extremely reliable components • Schedule pressures dictate some method of accelerated testing • Determination of thermal and electrical activation energies for antifuses is hampered by the lack of test vehicles • Results of 6000 hr life test are ambiguous without activation energies

  15. Space Qual Antifuse Characterization • Aerospace and Actel are investigating methods to electrically overstressing antifuses to determine activation energies • Trying to apply loads up to 50X in a realistic manner to increase failure rates • Acceleration factors for various “stressers” can then be measured

  16. Summary • Aerospace’s tests on commercial A54SX72A series from UMC foundry in general shows robust parts, but have identified some failures • Actel has identified some product enhancements to increase the robustness of the antifuses • Aerospace will perform evaluation and qualification tests on the modifications to ensure long term integrity of the product

More Related