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FPGA Switch Block Design

FPGA Switch Block Design. Dr. Philip Brisk Department of Computer Science and Engineering University of California, Riverside CS 223. FPGA Architecture (Recap). Routing Instance and an S Block. Flexibility of Interconnection Structures for Field-Programmable Gate Arrays.

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FPGA Switch Block Design

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  1. FPGA Switch Block Design Dr. Philip Brisk Department of Computer Science and Engineering University of California, Riverside CS 223

  2. FPGA Architecture (Recap)

  3. Routing Instance and an S Block

  4. Flexibility of Interconnection Structures for Field-Programmable Gate Arrays J. Rose and S. Brown, IEEE Journal of Solid-State Circuits 25(3): 277-282, Mar. 1991

  5. Key Questions • What is the effect of C Block flexibility on routing completion rate? • What is the effect of S Block flexibility on routing completion rate? • How do S and C Block flexibilities interact? • What is the effect of S and C Block flexibilities on the number of tracks per channel to achieve 100% routability?

  6. Switch Block Flexibility • Total number of possible connections offered to each incoming wire

  7. Switch Block Routability • Cannot route from A to B Fs= 2 Fs= 2 • Can route from A to B • Assymmetric about horizontal and vertical axes

  8. Example Connection Block

  9. Routability Study (One Benchmark) • Routing completion rate approaches 100% when FC> ½W • Increasing FS improves routability, but FC must be high to achieve 100% routability • Routing completion rate is low for low values of FC W = 14

  10. Routability Study (One Benchmark) • If FC is high enough, then low values of FS can achieve 100% routability • The number of different paths between the initial physical pin and the terminating C Block of a two-pin wire is given by: • where N is the number of S Blocks • on the global path W = 14 • For lower values of FC, increasing FS improves routability up to a point

  11. S Block vs. C Block Flexibility Avg. FC/W for 100% routing completion • A more flexible • S Block can compensate • for a less flexible C Block

  12. Track Count Requirement for BNREto Achieve 100% Routability

  13. Conclusion • C Blocks should have high flexibility to achieve high-percentage routing completion • S Blocks require limited flexibility • With low flexibility, only a few extra tracks more than the minimum can achieve 100% routability

  14. Universal Switch Modules for FPGA Design Y-W. Chang et al., ACM Transactions on Design Automation for Electronic Systems 1(1): 80-101, Jan. 1996

  15. Overview • A Switch Block with larger routing capacity has better area-performance in FPGA routing • Increased connectivity of routing components • Equivalence of LUT/CLB inputs permits pin permutations, which yields highly optimal routing • Most nets are short • 60% of nets route through at most 2 Switch Blocks • 90% of nets route through at most 5 Switch Blocks • Tradeoff between routing capacity and area

  16. Universal Switch Module Definition • A Switch Block of size W is universalif the following inequalities are sufficient to determine of an RRV is routable: Routing Resource Vector (RRV): N = (n1, n2, n3, n4, n5, n6), 0 <ni< W n4 n3 n1 Example: N = (1, 0, 1, 1, 0, 0) is routable on the following:

  17. Examples

  18. Universal Sub-modules • A sub-module of a Universal switch is also universal (but for a smaller W)

  19. Theoretical Results • A universal S Block can be constructed with at least 6W switches • Any S Block constructed with less than 6W switches cannot be universal

  20. Non-universal S Blocks Disjoint Switch Block (Xilinx XC4000 series) Antisymmetric Switch Block (Rose and Brown, 1991)

  21. Channel Width Required for 100% Routing Capacity (One Benchmark)

  22. Conclusion • Universal S Blocks offer better routability than disjoint and antisymmetric S Blocks • Algorithm presented to generate S Blocks that are universal (not discussed)

  23. Architectures and Algorithms for Field-Programmable Gate Arrays with Embedded Memory S. Wilton, Ph.D. Thesis, University of Toronto, 1997 (Section 6.1.2)

  24. S Blocks Disjoint Universal Wilton Start with Universal S Block, and rotate the diagonal connections by one track

  25. FPGA Routing Structures: A Novel Switch Block and Depopulated Interconnect Matrix Architectures M. I. Masud, M.S. Thesis, University of British Columbia, 1998

  26. Routing with a Disjoint S Block • Routing fabric partitioned into domains • Cannot cross domains (using routing only)

  27. Routing with a Wilton S Block • Eliminates domain choice problem • Many more routing choices are available

  28. Implementation Details Wilton Disjoint Wilton Disjoint Area Overhead

  29. Imran S Block • Routability of Wilton S Block • Implementation efficiency of Disjoint S Block

  30. Imran S Block • Tracks that terminate at the S Block • Wilton topology • Tracks that pass through the S Block • Disjoint topology

  31. Area Results

  32. Delay Results

  33. Channel Width Results

  34. Conclusion • Imran Switch Block • Routability of Wilton Switch Block • Area-efficiency of Disjoint Switch Block

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