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Computer Arithmetic

Computer Arithmetic

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Computer Arithmetic

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  1. Computer Arithmetic • Readings: Chapter 3 • Develop Arithmetic Logic Units (ALUs) to perform CPU functions. • Introduce multiplication, division, floating point.

  2. A B CI S CO 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Full Adder

  3. Multi-Bit Addition Cascaded Multi-bit Adder usually interested in adding more than two bits this motivates the need for the full adder

  4. A B A B A B A B 3 3 2 2 1 1 0 0 S S S S 3 2 1 0 A - B = A + (-B) = A + B + 1 Adder/Subtractor A B A B A B A B CO + CI CO + CI CO + CI CO + CI S S S S Overflow

  5. A B Zero Function Select Controls Negative Overflow R ALU: Arithmetic Logic Unit • Computes arithmetic & logic functions based on controls • Add, subtract • XOR, AND, NAND, OR, NOR • ==, <, overflow, …

  6. 00 01 10 11 S1 4:1 Mux S0 Bit Slice ALU Design • Add, Subtract, AND, OR Ai Bi ALU Output Bus

  7. 1-bit Slice 1-bit Slice 1-bit Slice 1-bit Slice Bit Slice ALU Design (cont.) • Route Carries • Overflow, zero, negative ALU2 ALU0 ALU3 ALU1 ALU[3:0]

  8. SLT • Set less than: if (A<B) then R = 1, else R = 0 • How do we know if (A<B) • Interaction w/overflow

  9. Shifter • Support shift operations: (A << 01101) • Optional shift by one: (A << b0) • Optional shift by two: (A << b1)

  10. Shifter (cont.)

  11. Multiplication • Example Multiplicand: 0 1 1 0 6Multiplier: 0 1 0 1 5 30 4 partial products Repeat n times: Compute partial product; shift; add NOTE: Each bit of partial products is just an AND operation

  12. Sequential Multipliers shift register 0 One bit of multiplier applied each cycle Originally holdsmultiplicand andshifts it left adder register 2n bit adder2n bit wide registers Alternatively: Shift result register to right Use only n AND gates More importantly use only n-bit adder

  13. Division • Example Divisor: 0010 (2) 0 1 1 0 (6) Dividend

  14. Sequential Dividers Originally holdsdivisor*231 andshifts it right Shift Register (Divisor) 2n bit subtracter2n bit wide registers Negative Subtracter Control Remainder Shift Register (Quotient) Alternatively: Shift remainder register to left Use only n-bit subtracter Remainder

  15. Floating Point • Want to represent numbers outside 231-1 .. –231 • Ideal: ~Scientific Notation • (+/-)Significand*BaseExponent 5.439 * 1012 1.010010 * 2100101 • Multiplication: • (5.1 * 1012) * (-2.0 * 10-3) • Sign: • Exponent: • Significand:

  16. Floating Point Addition • Addition: (5.38 * 105) + (4.99 * 105) (9.99 * 104) + (-1.0 * 105) • Sign: • Exponent: • Significand:

  17. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 s exponent significand Floating Point Representation • Floating Point (Float) = (-1)s * (1.significand) * 2(exponent-127) • -0.75 in Floating Point? 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00

  18. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 s exponent significand 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 significand (continued) Double Precision Representation • Double Precision (double) = (-1)s * (1.significand) * 2(exponent-1023) • -0.75 in Double Precision? 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00