Challenge and Significance

1. The ISRA algorithm will be used for coral (SeaBED) image understanding (R2) and its hardware implementation will allow faster information management (R3). • The hardware implementation of ISRA will aid in monitoring Coral reefs health in coastal shallow waters and other underwater habitats (S4). Equation 1. ISRA Algorithm FPGA Implementations of Image Space Reconstruction Algorithm(ISRA) Javier Morales and Nayda Santiago Electrical and Computer Engineering Department University of Puerto Rico, Mayagüez Campus Technical Approach Abstract Software Implementation Floating Point Adder and Multiplier The Image Space Reconstruction Algorithm (ISRA) has been used in hyperspectral imaging applications to monitor changes in the environment and specifically, changes in coral reef, mangrove, and sand in coastal areas. This algorithm is one of the set of iterative methods used in the hyperspectral imaging area to estimate abundance. However, ISRA is highly computational, making it difficult to obtain results in a timely manner. We present the use of specialized hardware in the implementation of this algorithm, specifically the use of VHDL and FPGAs. The implementation of ISRA algorithm has been divided into hardware and software units. The hardware units were implemented on a Xilinx Virtex II Pro XC2VP30 FPGA and the software was implemented on the Xilinx Microblaze soft processor. This illustrates that this approach is a design alternative for iterative hyperspectral imaging algorithms. The main bottleneck found in this implementations was data transfer. The Microblaze is a processor designed by Xilinx that introduces an integrated single precision, IEEE-754 compatible Floating Point Unit (FPU). The MicroBlaze core is a 3-stage pipeline, 32-bit RISC Harvard architecture soft processor core with 32 general purpose registers, ALU, and an instruction set optimized for embedded applications. It supports both on-chip block RAM and external memory. A C program was created to send and receive data to and from the different units created in hardware. We used the floating point unit on Microblaze to make the floating point division required by ISRA algorithm. The C program and all VHDL codes were compiled by Xilinx compiling tools and downloaded into the FPGA. The floating point adder uses the IEEE Standard 754 [1]. The process to add or subtract two floating point operands are as follows: decode (unmix) the three components of the floating point numbers concatenating the implicit 1 to the mantissa, align both mantissa by e1 − e2 (Exponent Rule), compare both operands, compute signs, add or subtract the mantissa, normalize the mantissa, compute the exponent and encode (mix) the three components of the number. All this process is shown in Figure 1 (a). A complete representation of floating point multiplication will be given in Figure 1 (b). The FPM behavior are as follow: the mantissas of the two operands are multiplied using a fixed point multiplier and the exponents are added. The extra bias is removed from the value of the exponent addition and the sign bit is calculated using a XOR. It is very important to note that in these operations the implied 1 of each mantissa is at the outset of the computation and then removed after its completion before the result is stored. Results • The ISRA algorithm was implemented using a Xilinx Virtex II Pro XC2VP30 FPGA. • We demonstrated the feasibility of implemementing hyperspectral analysis algorithms using FPGAs. • Despite these results, the full design required more execution time than the original work presented in [5]. This was due to data transmission and Input/Output (I/O) bottlenecks. (a) (b) Introduction In recent years, iterative algorithms used for abundance estimators have played an important role in the study of hyperspectral imaging. Numerous algorithms exist for abundance estimation, some of which are: Image Space Reconstruction Algorithm (ISRA), Expectation Maximization Maximum Likelihood (EMML), Non Negative Sum To One (NNSTO) and, Non Negative Least Square (NNLS). Unfortunately, these algorithms are slow and place a heavy burden on computing systems. Studies of software implementations of ISRA show that the number of iterations is the main reason behind the long execution times [5]. Hardware implementations of algorithms related to hyperspectral image studies [2], [3], [7] have shown considerable speedup when implemented on FPGAs. In order to reduce the execution time of ISRA algorithm, we have proposed to use a similar approach. Accomplishments up through Current Year • The ISRA algorithm was implemented using a Xilinx Virtex II Pro XC2VP30. • Paper submitted to the 49th edition of The Midwest Symposium on Circuits and Systems (MWSCAS’06). Plans • Future work includes: • Parallelization of computations. • In order to improve the data transmission and Input/Output (I/O) bottlenecks, we : • introduce the use of cache to memory. • increase the number of computing units to the design. Challenge and Significance Develop a hardware implementation of ISRA algorithm with the objective to reduce the execution time. ISRA is one of the most used abundance estimators algorithms on the study of hyperspectral imaging for the precision of his results [5] . Value Added to CenSSIS Figure 1. Floating Point Adder and Multiplier Block Diagrams State of the Art Numerator and Denominator Computation • In [5] Samuel Rosario implemented in software some abundance estimation methods like EMML, ISRA, NNLS, NNLSO, NNSTO and CLSPSTO. His work demonstrate that ISRA and EMML has the better results analyzing hyperspectral images, the limitation is that these implementations are time consuming. • Parallel Independent Component Analysis (PICA), Independent Component Analysis (ICA), and K-means are algorithms implemented in [2], [3] and [7] using FPGAs, illustrate its feasibility in improving the execution time. • In [2] Hongtao and Hairong implement a version of ICA called pICA. The implementation of ICA algorithm (for hyperspectral images reduction) in hardware provides an optimal parallelism environment and potential faster real time solution. • In [3] Leeser and Theiler develop on FPGA the k-means algorithm. This algorithm clustering pixels into classes, based on the spectral similarity of each pixel to other members of the class. FPGA can provide a considerably speedup and we are very flexible to permit the testing of variant and trade offs. • To the best of our knowledge, ISRA has not been implemented in hardware. The numerator of the ISRA algorithm consist of an array of adders and multipliers arranged to accomplish a dot product operation. Figure 2 (a), shows this arrangement. The register shown accumulates the partial results of the previous multiplication. The denominator is composed of two multipliers, an adder and, an accumulator register. The Denominator is shown on Figure 2 (b). Similar as in the numerator a register accumulates partial results of each multiplication. A C program controls the register, so that when the final result is obtained, the accumulation stops and the register is reset. Acknowledgement • The authors would like to thank Miriam Leeser and Samuel Rosario for all their assistance in the development of this project. References • IEEE Standards Board and ANSI. IEEE standard for binary floating-point arithmetic. IEEE STD 754-1985, 1985. • Hongtao Du and Hairong Qi. An FPGA implementation of parallel ICA for dimensionality reduction in hyperspectral images. Proceedings of IEEE International, Geoscience and Remote Sensing Symposium. IGARSS 04, 5:3257 – 3260, Sept. 2004. • M. Estlick M. Leeser, J. Theiler and J. J. Szymanski. Design tradeoffs in a hardware implementation of the K-Means clustering algorithm. Proceedings of the IEEE. Sensor Array and Multichannel Signal Processing Workshop., pages 520 – 524, March 2000. • Daube-Witherspoon M.E. and Muehllehner G. An Iterative Image Space Reconstruction Algorithm Suitable for Volume ECT. In IEEE Transactions on Medical Imaging, June 1986. • Samuel Torres Rosario. Iterative algortitms for abundance estimation on unmixing of hyperspectral imagery. Master Thesis, University of Puerto Rico, 2004. • Miguel Velez-Reyes, Angela Puetz, Michael P. Hoke, Ronald B. Lockwood, and Samuel Rosario. Iterative algorithms for unmixing of hyperspectral imagery. Algorithms and Technologies for Multispectral, Hyperspectral, and Ultraspectral Imagery IX, 5093(1): 418–429, 2003. • Yu Wei and C. Charoensak. FPGA implementation of non-iterative ICA for detecting motion in image sequences. In Control, Automation, Robotics and Vision, 2002. ICARCV 2002. 7th International Conference on, volume 3, pages 1332–1336, December 2002. Image Space Reconstruction Algorithm (ISRA) ISRA is a iterative algorithm used to estimate the proportion of each endmember present in the pixel of a hyperspectral image. It is an iterative algorithm that guarantees positive values in the results of the abundances and the convergence of the algorithm. ISRA is a useful method for image reconstruction in emission tomography [4] and HIS data unmixing [6]. Equation 1 describes the base algorithm: Figure 2. Numerator and Denominator Block Diagrams In our case the matrix A is the endmembers matrix (m x n), b is the pixel in observation (m) and is the abundance vector. Figure 3. Complete Hardware Implementation Diagram This work was supported in part by CenSSIS, the Center for Subsurface Sensing and Imaging Systems, under the Engineering Research Centers Program of the National Science Foundation (Award Number EEC-9986821).