Rich Katz, Grunt Engineer NASA Office of Logic Design

1. Briefing: Independent NASA Test of RTSX-SU FPGAsIntroduction Rich Katz, Grunt Engineer NASA Office of Logic Design

2. Schedule and Logistics • 9:30 am Meeting starts • 12:30 pm Lunch. Buildings 1 and 21 have cafeterias • 1:45 pm Meeting resumes • Work until we're done Audio and video recording is not permitted.

3. Presenters Dennis Dowden Northrop Grumman Space Technology Daniel K. Elftmann Actel Corporation Agustin Fernandez-Leon European Space Agency Lawrence I. Harzstark The Aerospace Corporation Rich Katz NASA Office of Logic Design Henning W. Leidecker NASA Goddard Space Flight Center Bruce M. Romenesko JHU/APL Douglas Sheldon Jet Propulsion Laboratory Norio Nemoto JAXA

4. Briefing Topics • Summary of Industry Tiger Team Results • Review of NASA Test Vehicle • Test Apparatus and Protocols • Test Results and Status • ESA related experiences and strategies • Aerospace Corp. Long-Term Experiments • Acceleration Factors • Statistical Analyses of Test Data • Discussion of Anomalies • Discussion of Device Structures • Programming Software and Algorithms • ESD Test Results • Wire Bond Test Results • Future Test Plans • Open Discussion

5. Five Generations of Actel Space Flight FPGAs • Notes: • Largest device in each family shown • RH parts available: RH1020, RH1280; TID hardened only • Gate counts approximate

6. Who Is UMC? • United Microelectronics Corporation founded in 1980 • Located in Taiwan • Volume production for 0.25 µm L250 process since Q4 1997. • Not new to Actel • Actel SX-A, eX, ProASIC Plus, and AX • Not new to NASA Space Missions • Xilinx space products fabricated at UMC1 • XQR4000XL (e.g., MER, GRACE) • XQVR/Virtex (e.g., MER) • XQR18xx • Others 1As presented at 2000 MAPLD International Conference paper [4] L250 process details available at: http://www.umc.com/english/process/e.asp

7. Family of SX-A, SX-S, and SX-SU FPGAs A54SX32A RTSX32SU RTSX32S A54SX32A UMC UMC MEC MEC 0.22µm 0.25µm 0.25µm 0.25µm

8. A few application notes(based on recently observed “oopses”)

9. GROUND THE TRST* PIN (USE 0 Ω)

10. SX-A/SX-S Clock Skew“OLD News #13,” July 15, 2003 • Initiated by A54SX32A failure (CPU_SIM), December 2002 • Minimum delay numbers calculated by the timing analysis tools are not guaranteed. • Any flip-flop pair, with a common edge, is guaranteed to have sufficient hold time margin under all conditions and placements, when clocked by HCLK. • For an arbitrary flip-flop pair, with a common edge (either rising or falling), when clocked by a global routed array clock: • No guarantee that it will be correct by construction under all conditions and placements. • There is no certified technique to prove adequate margin by analysis with the current tool set. • Skew-tolerant design techniques are recommended. • For an arbitrary flip-flop pair, with a common edge (either rising or falling), when clocked by a quadrant routed array clock: • Within a single quadrant: Any flip-flop pair, with a common edge (either rising or falling), is guaranteed to have sufficient hold time margin under all conditions and placements. • Over multiple quadrants: • When using internal routing to connect quadrant drivers: There is no guarantee that circuits will be correct by construction under all conditions and placements. • When using dedicated routing to connect quadrant drivers: There is currently no guarantee that circuits will be correct by construction under all conditions and placements. This case is currently being analyzed and tested by the manufacturer.

12. NASA Meeting Summary • January 2004, Independent Assessment Team • Finding: Device overstress, testing issues • Finding: One residual antifuse failure. • April 2004, Design Seminar • Understanding, identification, and reduction of stress • July 2004, Briefing: Actel RTSX-S and RTSX-SU • RTSX-SU Introduced • September 2004, Briefing: RTSX-S and RTSX-SU • RT54SX-S antifuse failures in low-stress condition • Early RTSX-SU reliability data • February 2005, Briefing: Independent NASA Test of RTSX-SU FPGAs • Finding: … Let’s get to work. • 2005 MAPLD International Conference (interim meeting if necessary)

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