1 / 35

Pass Transistor Logic

Pass Transistor Logic. Agenda. Introduction VLSI Design methodologies Review of MOS Transistor Theory Inverter – Nucleus of Digital Integrated Electronics Static CMOS Logic Circuits Pseudo nMOS Logic Circuits Pass Transistor Logic Circuits Dynamic Logic Circuits Case Studies.

samantha-golden
Télécharger la présentation

Pass Transistor Logic

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Pass Transistor Logic

  2. Agenda • Introduction • VLSI Design methodologies • Review of MOS Transistor Theory • Inverter – Nucleus of Digital Integrated Electronics • Static CMOS Logic Circuits • Pseudo nMOS Logic Circuits • Pass Transistor Logic Circuits • Dynamic Logic Circuits • Case Studies

  3. Pass Transistor Logic Circuits • nMOS Pass transistor – transmission properties • Transmission Gates • Transmission Gate Applications • Mux • XOR • D Latch • D Flip Flop • Clock Skew management • Pass Transistor Logic Families

  4. nMOS Pass Transistor – Logic ‘1’ Transfer

  5. nMOS Pass Transistor – Logic ‘0’ Transfer

  6. PASS TRANSISTORS IN SERIES

  7. PASS TRANSISTOR LOGIC CIRCUITS • nMOS Pass transistor – transmission properties • Transmission Gates • Transmission Gate Applications • Mux • XOR • D Latch • D Flip Flop • Clock Skew management • Pass Transistor Logic Families

  8. TRANSMISSION GATES • NMOS pass transistor passes a strong 0 and a weak 1. • PMOS pass transistor passes a strong 1 and a weak 0. • Combine the two to make a CMOS pass gate which will pass a strong 0 and a strong 1.

  9. TRANSMISSION GATE

  10. PROBLEMS WITH TRANSMISSION GATES • No isolation between the input and output. • Output progressively deteriorates as it passes through various stages. However designs get simplified.

  11. TRANSMISSION GATE - LAYOUT

  12. PASS TRANSISTOR LOGIC CIRCUITS • nMOS Pass transistor – transmission properties • Transmission Gates • Transmission Gate Applications • Mux • XOR • D Latch • D Flip Flop • Clock Skew management • Pass Transistor Logic Families

  13. Multiplexor

  14. Pass Transistor Logic Circuits • nMOS Pass transistor – transmission properties • Transmission Gates • Transmission Gate Applications • Mux • XOR • D Latch • D Flip Flop • Clock Skew management • Pass Transistor Logic Families

  15. XOR gate

  16. PASS TRANSISTOR LOGIC CIRCUITS • nMOS Pass transistor – transmission properties • Transmission Gates • Transmission Gate Applications • Mux • XOR • D Latch • D Flip Flop • Clock Skew management • Pass Transistor Logic Families

  17. D – Latch

  18. TIMING ISSUES

  19. D LATCH

  20. D - LATCH

  21. D LATCH – ALTERNATE CIRCUIT TOPOLOGY

  22. PASS TRANSISTOR LOGIC CIRCUITS • nMOS Pass transistor – transmission properties • Transmission Gates • Transmission Gate Applications • Mux • XOR • D Latch • D Flip Flop • Clock Skew management • Pass Transistor Logic Families

  23. Static Flip Flop Clk Clk D 0 1 Q 1 0 Transparent when Clk=0 Transparent when Clk=1 At Clk= 0  1, Q = D. Else Q is held.

  24. D Flip Flop – Circuit Diagram

  25. D Flip Flop - Operation

  26. D Flip Flop - Waveforms

  27. Pass Transistor Logic Circuits • nMOS Pass transistor – transmission properties • Transmission Gates • Transmission Gate Applications • Mux • XOR • D Latch • D Flip Flop • Clock Skew management • Pass Transistor Logic Families

  28. Handling Clock Skew Clk-in Clk Clk'

  29. Pass Transistor Logic Circuits • nMOS Pass transistor – transmission properties • Transmission Gates • Transmission Gate Applications • Mux • XOR • D Latch • D Flip Flop • Clock Skew management • Pass Transistor Logic Families

  30. Pass Transistor Logic Families • Complementary Pass Transistor Logic Family • Dual Pass Transistor Logic Family • Swing Restored Pass Transistor Logic Family

  31. Problems • Design 4 to 1 multiplexor using transmission-gates. • Implement an XOR gate using minimum number of transistors. • Implement a full adder using transmission gates.

  32. Solution - 1 C1 C'0 A0 C0 C'1 A1 Y A2 A3

  33. Solution - 2 C'0 A0 C0 C'1 A1 C1 Y A2 A3

  34. XOR Gate A B AB

More Related