Using the HPTDC for UTC time tagging
Using the HPTDC for UTC time tagging. Javier Serrano on behalf of the LHC Machine Timing Project Team HPTDC Workshop, CERN, 13 May 2003. The CTRP card. RS-422 Timing Messages. I/O buffers. FPGA. HPTDC. TTL inputs. UTC locked 40 MHz. TTL outputs. Control. PLL.
Using the HPTDC for UTC time tagging
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Presentation Transcript
Using the HPTDC for UTC time tagging Javier Serrano on behalf of the LHC Machine Timing Project Team HPTDC Workshop, CERN, 13 May 2003
The CTRP card RS-422 Timing Messages I/O buffers FPGA HPTDC TTL inputs UTC locked 40 MHz TTL outputs Control PLL More information, including complete schematics at: https://edms.cern.ch/item/PS-000177/0
An example application • An oscilloscope is triggered in some point of the LHC. • The trigger pulse is time-tagged with a CTRP card. • Other oscilloscopes have been pre-triggered in other parts of the machine. • Time stamp is used to display all signals in one virtual scope for the operators.
Usage of the HPTDC • 5 channels to tag, plus one reference (10 kHz UTC train), to within 1ns. • No trigger. • Free running 40 MHz counter. • Need to correlate time tags of the five channels with that of the reference (post-processing in the FPGA). • JTAG configuration probably done by software via memory-mapped 4 bit register.
Dates • May 13: design submitted to PCB design office. • Mid July: prototype ready for tests. • End August: product ready for customers ( ~200 cards max.).
