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CZT/CdTe pixel detectors

CZT/CdTe pixel detectors. JRA-1 ISRSI Consortium Meeting Perugia, 17-01-2005 INAF/IASF (BO,PA).

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CZT/CdTe pixel detectors

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  1. CZT/CdTe pixel detectors JRA-1 ISRSI Consortium Meeting Perugia, 17-01-2005 INAF/IASF (BO,PA)

  2. This work is the preliminary activity in the framework of the development of an Itialian hard X ray (10-80 keV) telescope based on multilayer mirrors. The current project (funded for 6 months by the technological department of the Italian Space Agency, ASI) foresees the production of a multilayer test optics (OAB) and two small focal plane prototypes. Low noise and power consumption ASIC for CZT/CdTe pixellated detectors Politecnico di Milano Construction of microstrip CdTe detector prototype IASF/CNR – Sezione di Bologna Construction of Pixel CZT detector prototype IASF/CNR – Sezione di Palermo

  3. Pixel detector (16x16 pixels) and connection interface The typical dark current level at 200 V bias is 0.2-0.3 nA/pixel

  4. Microstrip detector and connection interface (left) Photograph of the CdTe microstrip detector. On the opposite surface the strip layout is the same but in the othogonal direction; (right) A microscopic view of the same detector showing the bonding of each strip obtained using brass wire (150 µm wide) and conductive glue. The microstrip detector mounted on a ceramic (Al2O3) bilayer substrate. In the vertical direction the two 8-pin connectors for the anode readout through the ASIC (DC coupling) are visible while in the opposite direction are the connectors for the cathode readout using 8+8 charge sensitive amplifier (AC coupling)

  5. The new ASIC for the hard x-ray focal plane The ASIC chip was first developed for thick CdTe/CZT array detectors for use in astrophysics applications over a wide energy range (20-2000 keV). The current design is a modification of the original ELBA (ELettronica a BAsso rumore e consumo) chip in which the dynamic range has been tuned to the 10-100 keV range. The chip can be easily tuned to the I-V characteristics of the detector by means of the Ipre input that modifies the MOSFET operation current. Technology : 0.8 m BiCMOS (AMS) Energy Range : 10 keV – 100 keV (CdTe-CZT) 8 channels: Charge Preamplifier + Shaper (peaking time 1.2 s) Power consumption : 0.5 mW/ch

  6. ASIC tests results (I) Channel vs energy linearity. The linearity of the single channels is better than 0.4% over the entire energy range (from ~5 keV to 100 keV). Response of an ASIC channel to signals simulating various photon energies

  7. ASIC tests results (II) The equivalent noise (rms) of each ASIC channel as a function of the MOSFET current The ASIC gain and gain uniformity as a function of Ipre : the gain uniformity is always better than 5%.

  8. The ASIC board I/F with the pixel detector To optimize the coupling with the pixel detector and to be able to read out contiguous subsets of pixels (at least 88) the ASICs have been mounted on a ceramic board containing the bias circuit and filters. The major constraint on the design of this support is due to the layout of the detector output pins: the board thickness is limited to 2.5 mm and the lateral size to 82.5 mm.

  9. The Multiparametric back-end electronics Multiparametric electronics (up to 128 channels) with coincidence logic. Each pixel is connected to a separate electronic channel. Each event above the threshold is loaded into a de-randomisation FIFO, converted by a flash 12 bit ADC and then a 32 bit word is generated containing for each hit in the coincidence time window the pixel id and the 10 MSB of amplitude (energy).

  10. Data Handling Electronics Gamma camera-like (16+16 channels) with position averaging. This system uses a resistor array (the XY/Strip small box in the scheme of Fig. 6 and in the picture shown in Fig. 7) as the interface between the detector channels and the ADC (12 bit). Each signal above a user-defined energy threshold is transmitted through the resistor array at each corner and converted by 4 flash ADCs (Xa, Xb, Yc, Yd). The energy (10 bit) of the event is reconstructed by summing the 4 signals, while the position coordinates (x,y) are provided by the weighted average (10 bit) of the signals in both directions by means of: x = (Xa – Xb)/(Xa+Xb) ; y =(Yc-Yd)/Yc+Yd) The final reconstructed data is loaded in a 32 bit unsigned word and transmitted to the acquisition system using an handshake protocol.

  11. Quick-Look Analysis

  12. Threshold ≈ 8 keV Resolution ≈ 4.7 % Pixel Detector (CZT) Spectral Resolution @ 60 keV

  13. Pixel Detector (CZT) Spatial resolution and pixel cross-talk Spatial distribution of counts when the beam is collimated on a single pixel. (right) the counts colour map of the incident and neighbouring pixels. (left) the histogram of the pixel to total counts ratio. Almost 90% of the photopeak (60 keV) counts are detected by the irradiated pixel.

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