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Introducing PS2 to PC ProgrammersProgrammers

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Introducing PS2 to PC ProgrammersProgrammers

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Introducing PS2 to PC ProgrammersProgrammers

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  1. Introducing PS2 to PC Introducing PS2 to PC Programmers Programmers David Carter SCEE Technology Group David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 1 ©2002 Sony Computer Entertainment Europe

  2. What We Will Be Covering What We Will Be Covering • An overview of the hardware • A basic rendering pipeline • How to improve performance • Under used capacities • PS2 design techniques • Questions… David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 2 ©2002 Sony Computer Entertainment Europe

  3. What We Will Not Be Covering What We Will Not Be Covering • A MIPS programming course • Showing any sample code • The price of beer (I am so glad it is cheap!) • A PS2 in chocolate (ummm…tasty!) David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 3 ©2002 Sony Computer Entertainment Europe

  4. Basic PS2 Architecture Basic PS2 Architecture IOP: Input Output Processor SPU2: Sound Processor SPU2 IOP Emotion Engine IPU 128bit bus DMA Memory 32mb GS 4mb cache GIF VU0 VU1 FPU EE CORE EE: 128-bit Emotion Engine VU0/VU1: Vector Units FPU: Floating Point Unit GS: Graphic Synthesiser DMA: Direct memory access IPU: Image processing Unit David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 4 ©2002 Sony Computer Entertainment Europe

  5. Caches And Scratchpad Caches And Scratchpad Emotion Engine SIF IPU 128bit bus DMA Memory 32mb GS 4mb cache VIF VIF GIF FPU EE CORE VU0 VU1 I$ 16k D$ 8k SPR 16k • Similar to old style PC L1 cache. • PS2 has small caches, as it was felt that a lot of dynamic data would not be in the cache for any length of time. EE CORE David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 5 ©2002 Sony Computer Entertainment Europe

  6. EE Vector Units EE Vector Units Emotion Engine SIF IPU 128bit bus DMA Memory 32mb GS 4mb cache VIF VIF GIF FPU EE CORE VU0 VU1 • Each vector unit can do 4 multiplies and 4 adds in a single instruction and can transform about 36million vertices/sec. • Both can operate in Micromode – LIW architecture (32bits*2) • Argued that due to the PS2 architecture the PC paradigm started to shift with the emergence of Vertex Shaders. David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 6 ©2002 Sony Computer Entertainment Europe

  7. Graphic Synthesiser Graphic Synthesiser Emotion Engine SIF IPU 128bit bus DMA Memory 32mb GS 4mb cache VIF VIF GIF FPU EE CORE VU0 VU1 Primitives per second: 150million points 50million textured sprites 75million untextured triangles 37.5million textured triangles Features: Alpha blend, Z-test, Bi- linear/tri-linear filtering. Efficient scissoring and a fill rate of 2.4-giga pixel. David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 7 ©2002 Sony Computer Entertainment Europe

  8. GIF Connection For VU1 GIF Connection For VU1 Emotion Engine SIF IPU 128bit bus DMA Memory 32mb GS 4mb cache VIF VIF GIF FPU EE CORE VU0 VU1 • Vector Unit 1 has a dedicated output path to the GIF • It also has a much larger internal memory than VU0 to support double buffering of input and output data. • This enables fast transformation and output to GS of patterned data. David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 8 ©2002 Sony Computer Entertainment Europe

  9. Fill Rate Fill Rate Emotion Engine SIF IPU 128bit bus DMA Memory 32mb GS 4mb cache VIF VIF GIF FPU EE CORE VU0 VU1 • Bandwidth of 4MB Embedded DRAM 48GB/sec – Bandwidth of frame buffer 38.4Gb/sec – Texture bandwidth 9.6Gb/sec • Fill rate 1.2Giga pixel a sec for texture • Fill rate 2.4Giga pixel a sec for untextured David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 9 ©2002 Sony Computer Entertainment Europe

  10. IOP, SPU And IOP, SPU And Backwards Compatibility Backwards Compatibility SPU2 SPU mem 2mb CD, HDD, Pad, USB, I-link, TCP/IP IOP IOP mem 2mb 32bit bus Emotion Engine SIF IPU 128bit bus DMA Memory 32mb GS 4mb cache VIF VIF GIF FPU EE CORE VU0 VU1 The IOP processor comes from PS1, this solves compatibility! David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 10 ©2002 Sony Computer Entertainment Europe

  11. DMA DMA Emotion Engine SIF IPU 128bit bus DMA Memory 32mb GS 4mb cache VIF VIF GIF FPU EE CORE VU0 VU1 • DMA bus has a bandwidth of 2.4Gb/sec, faster than AGPx8 which is (in theory!) 2.1Gb/sec. • The DMA bus controls all data transfers in the system. • The DMAC will not stall the CPU when transferring data. • DMA transfers must be aligned to 128bits. David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 11 ©2002 Sony Computer Entertainment Europe

  12. DMA Data Transfer DMA Data Transfer Time sliced: 8qword to 1 8qword to 2 8qword to 3 repeat CPU cache Main memory Device4 start DMA controller Device0 Dedicated channel for each device Device3 Device1 NOTE Device2 DMA bypasses the cache To send data through a channel you just specify the start address, the data size and a start signal to the DMAC. David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 12 ©2002 Sony Computer Entertainment Europe

  13. DMA Chains DMA Chains HeadTag Matrix Texture Ref Ref 1000 0100 0010 0001 0010 0001 1000 0100 1000 Binary Data 0010 0001 NextTag Matrix Ref Vertices Ref Ref Normals VIFCode EndTag Microcode start Texture Coords Built from list of tags, can contain many data types David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 13 ©2002 Sony Computer Entertainment Europe

  14. Basic Rendering Pipeline Basic Rendering Pipeline Calculate animation CPU + coprocessor VU0 +-*/ Traverse scene List processing DMA Transform to 2D +-*/ VU1 GS Rasterisation David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 14 ©2002 Sony Computer Entertainment Europe

  15. How To Improve PS2 Performance How To Improve PS2 Performance • By not treating the PS2 as a PC • By using texture sizes and formats • Prevent the thrashing of Texture Cache • Without abusing Instruction and Data Cache David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 15 ©2002 Sony Computer Entertainment Europe

  16. 1st Attempt At A PC Port 1st Attempt At A PC Port (max 0.5 million polys) (max 0.5 million polys) IOP SPU IPU Memory DMA bus: 2.4Gb/sec Geometry and texture FPU CPU VU0 VU1 GS Transformation David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 16 ©2002 Sony Computer Entertainment Europe

  17. 2nd Attempt At A PC Port 2nd Attempt At A PC Port (max 1.5 million polys) (max 1.5 million polys) IOP SPU IPU Memory DMA bus: 2.4Gb/sec Geometry and texture FPU CPU VU0 VU1 GS Transformation in parallel with CPU David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 17 ©2002 Sony Computer Entertainment Europe

  18. VU Renderer (lighting, no animation) VU Renderer (lighting, no animation) (typical 10 (typical 10- -20 million polys) 20 million polys) IOP SPU IPU Memory DMA bus: 2.4Gb/sec Geometry Texture FPU CPU VU0 VU1 GS Transformation David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 18 ©2002 Sony Computer Entertainment Europe

  19. Complete Game (lighting, animation) Complete Game (lighting, animation) (typical 5 (typical 5- -10 million polys) 10 million polys) IOP SPU IPU Memory DMA bus: 2.4Gb/sec Geometry Texture FPU CPU VU0 VU1 GS Transformation David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 19 ©2002 Sony Computer Entertainment Europe

  20. VRAM Layout VRAM Layout • 4MB Embedded memory • 4MB of VRAM is split into 8K pages – Pages split into 32 blocks of 256 bytes • Frame buffers addressed by page • Textures addressed by block – Allowing multiple textures per page Buffer1 Buffer2 Z Texture David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 20 ©2002 Sony Computer Entertainment Europe

  21. By Using Texture Size And Format By Using Texture Size And Format • 4MB of VRAM is split into 8K pages – Pages split into 32 blocks of 256 bytes • Block position varies based on format • Possible to store multiple textures in 1 page • EG 16-Bit Texture Page 0 2 1 3 4 6 5 7 16 18 24 26 17 19 25 27 20 21 28 30 22 23 29 31 8 9 10 11 12 14 13 15 David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 21 ©2002 Sony Computer Entertainment Europe

  22. GS Coordinate System GS Coordinate System • Frame Buffers use a 16-bit coordinate system – 12-bit integer . 4-bit fraction – Full Range 0 - 4095.9375 • Typically centre specified as (2048, 2048) • Scissoring area specified based relative to this centre David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 22 ©2002 Sony Computer Entertainment Europe

  23. GS Coordinate Scissoring GS Coordinate Scissoring 0,0 • X and Y Values are 16bit – Scissoring will not work outside that range • No hardware clipping – There is a VU clip instruction X Y 4096,4096 David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 23 ©2002 Sony Computer Entertainment Europe

  24. Prevent The Thrashing Of Texture Prevent The Thrashing Of Texture Cache Cache • Current texels read from Texture Cache – Only 8K in size or 1 Texture Page – Costs to reload Texture Cache • No need to use PC-style 32-bit textures – Too many colours, takes up too much VRAM – Aiming for TV not a PC Monitor • Texture Sizes that fit into Texture Cache – 4bit 128x128, 8bit 128x64 (with CLUT) – 16bit 64x64, 32bit 64x32 David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 24 ©2002 Sony Computer Entertainment Europe

  25. Instruction And Data Cache Issues Instruction And Data Cache Issues • Cache Issues – Large Loops and Jumps – Large Objects/Structures – Consider the cost of useful C++ features (e.g. Templates) they can have a negative effect • What can help? – Breaking large loops into several smaller loops – Check disassembly of code for inlining – Un-cached Memory Access (0x20000000) – Scratchpad is the fastest memory you have direct access to, use as a main work area. David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 25 ©2002 Sony Computer Entertainment Europe

  26. Vector Unit 0 Usage Vector Unit 0 Usage Emotion Engine SIF IPU 128bit bus DMA Memory 32mb GS 4mb cache VIF VIF GIF FPU EE CORE VU0 VU1 • Suggested for taking some work off the CPU and help reduce I$ misses. • Its not recommended to use VU0 in Macromode. • Use Micromode and allow the CPU to carry on in parallel. David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 26 ©2002 Sony Computer Entertainment Europe

  27. VIF Data VIF Data Compression/Decompression Compression/Decompression Emotion Engine SIF IPU 128bit bus DMA Memory 32mb GS 4mb cache VIF VIF GIF FPU EE CORE VU0 VU1 8-bit • Compressed formats reduce memory size of model. • Decompression from packed formats by the VIF, provides reduction load on VU. X Y Z X Y Z 1.0 32-bit David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 27 ©2002 Sony Computer Entertainment Europe

  28. Texture And Geometry Streaming Texture And Geometry Streaming Emotion Engine SIF IPU 128bit bus DMA Memory 32mb GS 4mb 64 bit cache VIF VIF GIF FPU EE CORE VU0 VU1 • 1.2Gb/sec max bandwidth (24-meg/frame). • GIF arbitrates between paths and packs data in to 64bit for GS. • Watch priority ordering with paths to the GIF. David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 28 ©2002 Sony Computer Entertainment Europe

  29. Summary Summary • The key to PS2 power is keeping the units busy • Keeping data moving in parallel is the key to keeping the processors fed with data. • DMA is the system which does this. This is the most crucial thing to understand to get performance on PS2. • VRAM seems small but there are plenty of tricks. • Cache issues… remember Scratchpad! • Vector Unit 0 is underused. David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 29 ©2002 Sony Computer Entertainment Europe

  30. Contact Contact • Contact Information: – SCEE Booth Exhibition Stand #9 David Carter – Introducing PS2 to PC Programmers AGDC 2002 - 30 ©2002 Sony Computer Entertainment Europe

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