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3D Standards

3D Standards. Karthik Chandrasekar June 2014. Need for Standards in 2.5D/3D IC Products. Standards are “Must have” for high volume Products Application Drivers for 2.5D/3D adoption are compelling Transition from low volume to high volume is a matter of time

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3D Standards

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  1. 3D Standards Karthik Chandrasekar June 2014

  2. Need for Standards in 2.5D/3D IC Products • Standards are “Must have” for high volume Products • Application Drivers for 2.5D/3D adoption are compelling Transition from low volume to high volume is a matter of time • JEDEC, SEMI, Si2, IEEE etc.. have made lot of progress Wide IO/HBM Memory, TSV Metrology, IEEE test P1838/1687/1149.7, PDN EDA exchange formats, Thermal EDA exchange formats etc.

  3. Recommendations for EDA and DFT standards development to accelerate 2.5D/3D IC evolution • Resolve key gaps for 2.5D/5.5D  adoption : Verification (EDA) and DFT • Enable 3D IC for long term : Stress modeling (EDA), Verification (EDA) and DFT • Application specific focus in defining EDA exchange formats : P&R vs. Full custom • IC and Package designers use different EDA formats : Convergence needed

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