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Customizable Embedded System Architectures

Customizable Embedded System Architectures

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Customizable Embedded System Architectures

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  1. Customizable Embedded System Architectures Peter Petrov and Alex Orailoglu University of California, San Diego

  2. Embedded Processors Market • Embedded processors occupy more than 90% of the entire processor market • A large number of electronic products require high-end 32/64-bits embedded processors

  3. Automotive Multimedia Cell phones • Engine control • Automatic transmission • ABS, GPS • DVD/MP3/CD • Video games • Digital cameras • DSP computation • Speech codecs • Wireless protocols Embedded Processors Market • Embedded processors occupy more than 90% of the entire processor market • A large number of electronic products require high-end 32/64-bits embedded processors

  4. Application Requirements • Design cost General embedded processor architectures introduced to satisfy these constraints! • Time-to-market • Flexibility

  5. Application Requirements • Design cost General embedded processor architectures introduced to satisfy these constraints! • Time-to-market • Flexibility Processor architecture • Deterministic Performance • Power consumption • Performance

  6. FPGA P ASIC New Architectural Paradigm Design costTime-to-marketFlexibilityDeterminismPowerPerformance Design costTime-to-marketFlexibilityDeterminismPowerPerformance Design costTime-to-marketFlexibilityDeterminismPowerPerformance

  7. New Architectural Paradigm DeterminismPowerPerformanceDesign costTime-to-marketFlexibility FPGA ASCP P ASIC Application-Specific Customizable Embedded Processor • Helps preserve the benefits of generality • Alleviates the drawbacks of general-purpose processors

  8. ISA Strengths: Strengths: • Execution information available • Optimizes instruction instances • Global program information available • “Unlimited” processing power available Weaknesses: Weaknesses: • Limited processing power • Run-time “training” requires storage • Limited application knowledge • ISA used for information transfer • No run-time information Static vs. Dynamic Optimizations in General Purpose Processors ApplicationInformation Application Micro-Architecture Hardware for dynamic resolution ArchitecturalOptimizations CompilerOptimizations

  9. Dynamically Customizable Embedded Processors Application • Compilers for static extraction • Architectural Runtime incorporation • ASCL “shapes” the processor by matching compiler information to microarchitecture Micro-Architecture ISA Hardware for dynamic resolution ASCL Execution Resources ASCL – Application Specific Customization Logic • Provides deterministic information about application regularities • Restricts the domain of possible application behaviors

  10. Microarchitecture Microarchitectural Customizations • Use of application knowledge in microarchitectural modules • Power • Performance • Determinism • Reprogrammable customization hardware • Post-manufacturingre-customizations • Large manufacturing volumes FU2 FU1 Program RAM Application P

  11. Information Transfer and Hardware Support • Application hot spots targeted • Application information loaded into special hardware tables/registers, providingreprogrammable implementation • Information transfer eitherby softwareorsystem setup Loop A ASCL App Information Loop B Loop C Application-Specific P Application Special registers or tables

  12. TLB Reg File ASBR I-Mem ACBTB … Low-Power Instr. Transform Data Cache FU1 Decode Partitioned/Compressed Tags FU2 Unified Customizable Architecture Data Memory ALU A unified, dynamically customizable embedded processor architecture

  13. Application Knowledge Benefits:Precise application knowledge Application Micro-Architecture ISA CachesBranch Pred., etc. FU2 … FU1 • Statistically based methods normally used to infer application properties • Power expensive microarchitectural components • Highly sub-optimal performance • Unpredictable execution time

  14. Application Knowledge Benefits:Precise application knowledge Application Micro-Architecture ISA CachesBranch Pred., etc. ASCL FU2 … FU1 • Statistically based methods normally used to infer application properties • Precise application knowledge used instead through the ASCL • Application regularities readily available for utilization => Scaled down and power efficient uArchitectural components • Deterministic execution time achieved

  15. P2 P2 P1 P1 P3 P3 Application Knowledge Benefits:Refined program behavior ISA Micro-Architecture Worst case assumption for the program execution P4 FU2 … P5 FU1 A large set of potential programs! • Worst case execution scenario assumed in general purpose processor

  16. P2 P1 P2 P3 P1 P3 P4 P5 Application Knowledge Benefits:Refined program behavior ISA Micro-Architecture Considering a single program segment only! ASCL FU2 … FU1 A large set of potential programs! • Worst case execution scenario assumed in general purpose processors • Application knowledge refines the domain of all possible states • Redundant hardware activities removed => Power savings

  17. Conclusions • A customizable processor architecture defined • In-field recustomization • High volumes due to fixed-silicon architecture • A unified architecture for diverse sets of tasks • The adaptive architecture provides flexibility, high utilization, and low power for an ever increasing and diverse set of applications • Experimentally verified orders of magnitude improvements