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Learn how the ARM Interrupt Handler Component handles seven cases like Reset, Data Abort, FIQ, IRQ, and more with ROM files for memory addresses and CPSR alterations.
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Interrupt Handler Component must handle the following seven cases: • Reset (Highest Priority) • Data Abort • FIQ • IRQ • Prefetch Abort • Undefined Instruction • Software Interrupt (SWI) (Lowest Priority)
Implementation • One ROM file handles memory addresses. • 3-bit input leads to 32-bit address for PC. • Second ROM file handles CPSR alterations. • 4-bit input leads to lower 8 bits of CPSR. • Priorities of the interrupts are handled with CLZ functionality. • Lastly, no interrupts leads to “Active = 0”.