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ELEC 3509 Fall 2012

ELEC 3509 Fall 2012. Lab hints, tips and other information to make both our lives easier. Seriously, take this stuff into account. ELEC 3509 – Fall 2012. Course website http://www.doe.carleton.ca/~jrogers Course Notes + Lab manual Norman Fong (head TA) 3303 Canal Building

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ELEC 3509 Fall 2012

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  1. ELEC 3509 Fall 2012 Lab hints, tips and other information to make both our lives easier. Seriously, take this stuff into account.

  2. ELEC 3509 – Fall 2012 • Course website • http://www.doe.carleton.ca/~jrogers • Course Notes + Lab manual • Norman Fong (head TA) • 3303 Canal Building • nofong@doe.carleton.ca • Lab website • http://www.doe.carleton.ca/~nofong/ELEC3509 • Lab guidelines (read this!) • Lab marking schemes • Try to check this website at least once before each lab

  3. ELEC 3509 – Fall 2012 - Labs • Labs are every week • Worth 35% of your final mark • You MUST pass the lab in order to pass the course • Fall 2012: 6 FNDs • 120 started the course, ~90 wrote the final • You MUST hand in a satisfactory report for every lab • You cannot hand in a blank sheet of paper and “take a zero” on a lab. • Lab kits will be distributed during the first lab • Lab Plagiarism: Just don’t do it • Zero tolerance! Automatic zero for both parties.

  4. 4195 Mackenzie building • Lab sections • L3: Monday 2:35-5:25 • L4: Tuesday 2:35-5:25 • L1: Wednesday 8:35-11:25 • L2: Friday 8:35-11:35 • You must attend your registered section • However you can work extra in the lab on your own anytime the lab is open.

  5. Lab Goals • Learn to write effective lab reports • Learn to work in a group • Learn to manage your time • Learning to solve problems yourself 5. Learn technical aspects of Electronics

  6. Lab Goals • Everything you do in the labs and prelabs is directly relevant to the course material and will be on the midterm and final exams. • As a 3rd year Engineering student you are expected to be able to debug your circuit on your own before calling over a TA.

  7. Lab Guidelines • Labs will be performed in groups of 2 • One report is to be submitted per group. Both students will be given the same mark. • Every lab will have a marked prelab. • All or nothing • Does not have to be 100% correct but reasonable effort must be shown • Every lab will have a marked checkout • Your lab must be complete on time and in your designated lab section • If you are knowingly going to miss a lab contact Norm prior to the lab • We can arrange an alternate lab day for you to attend without lateness penalty

  8. Lab Reports • Reports are due one week after the lab has been completed • They are due 30 minutes after the beginning of your lab session • Drop off in stairwell drop boxes outside 41xxME. • Late reports will lose 25% immediately and 10% PER DAY after.  • If you are knowingly submitting your lab late, contact your TA immediately and an electronic submission may be accepted. • It is ultimately YOUR responsibility to have your lab in on time.

  9. Mark Disputes • We will try to return your labs 1 week after they are submitted • If there is an obvious error in the mark then feel free to casually inquire about it with the TA • For ANY other reason we request that you wait a day, and send the marking TA e-mail with an explanation as to why you think you deserve a different mark. If this cannot be resolved then you may request a meeting with him • TAs are instructed to NOT give out additional marks just because a student complains. Justification is required. • Tactics such as intimidation, mad-dogging and begging will be met with laughter and mockery.

  10. Prelabs • Every lab has a marked prelab • The prelabs can be quite extensive. Don’t wait until the night before to start them! • You may be asked technical questions about your prelab to verify that it wasn’t just copied • The prelabs will be checked at the beginning of the lab (~first 30 mins) • The prelabs typically include all of your design calculations and hence you will not be able to start the lab until your prelab is done • You will likely not finish on time if your prelab is not ready at the start of the lab

  11. Lab Schedule Lab 1: BJT DC and AC Characteristics (2 weeks) Lab 2: Two transistor amplifier project (3 weeks) Lab 3: 741-Op Amp (2 weeks) Lab 4: Active bandpass filter (2 weeks) Lab 5: Oscillator (1 week, no report) INSANITY WEEKS

  12. Lab Report Tips • Prove to us that you did the work and understood it • Readable without having prior knowledge of the lab • Explain what you did and how you did it • Results are explained and discussed • You will NOT be given the benefit of the doubt if your explanations are vague/unclear • Do NOT just show your numbers • Reports should be thorough but concise • No strict format • Label all plots and figures with appropriate units • Stay in contact with your lab partner to make sure everything’s done on time.

  13. Lab Tips • Familiarize yourself with the breadboard • Utilize the upper and lower “rails” for your power supplies. • Intelligently place your transistors, resistors and chips. • Use short jumper cables instead of stretching out the pins on your device. • Try to lay out your devices to match the circuit diagram.

  14. VCC=15V Lab Tips Bad Idea Good idea

  15. Lab Tips + -

  16. Lab Tips • A potentiometer is a 3 terminal variable resistor which acts as a voltage divider. • You do not need to add another 1kΩ resistor to your circuit. The potentiometer is the resistor.

  17. Other Lab Tips • Do not measure current directly on the multimeter. • Measure the voltage across the resistor and use Ohm’s law (V = IR) • Use “Diode” range to measure diodes

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