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2009 Logic Major Revision: Enhancements in MOSFET Performance, Ring Oscillator Delays, and Reliability Guidelines

The 2009 logic major revision introduces improvements in p-MOSFET performance, ring oscillator delays, and reliability specifications. Notable upgrades include decreased Ioff to 100 nA/um, NAND half-pitch advancements, and a focus on circuit impact of device reliability.

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2009 Logic Major Revision: Enhancements in MOSFET Performance, Ring Oscillator Delays, and Reliability Guidelines

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  1. PIDS Major Revision for 2009 Logic: • Add p-MOSFET performance (n-channel/p-channel Isat and cap ratios). • Add ring-oscillator delays (FO=1 & FO=3 or 4, in addition to CV/I). • Racc specs tightened (35% Isat degradation as opposed to 40-50%). • Ioff = 100 nA/um (as opposed to 200-700 nA/um). NVM: • NAND half-pitch, pull in1year from ITRS 2008, i.e. 32 nm in 2010. • FG-CTF transition in 2012, delay 2 years. 3D-CTF in 2014, delay 1year. • 3 bit–4bit/cell transition delays 2 years (2012). • NOR Flash survey on-going. • Add STT MRAM. DRAM: • Cell factor–4F2 cell in 2011. Reliability: (New Sub-Group lead) • Major correction in the reliability requirement specifications. • Increase emphasis on circuit impact of device reliability issues. • Bring up the need for paradigm change and the challenge involved. • ddd

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