1. Types of Pentium Processors • Pentium • Pentium MMX • Pentium Pro • Pentium II

2. Standard Pentium Parts Branch Predictor Unit 8K Code Cache Instruction Prefetch Buffer & Decode Unit BIU Bus Interface Unit Floating Point Unit ALU ALU Registers To RAM 8K Data Cache

3. Pentium MMX Technology • Designed for better multimedia abilities. • Bigger caches for more readily available code & data • TLB’s for faster addressing • MMX unit for multimedia functions.

4. 16K Code Cache Branch Predictor Unit 8K Code Cache Instruction Prefetch Buffer & Decode Unit BIU Bus Interface Unit Floating Point Unit ALU ALU Registers To RAM 8K Data Cache 16K Data Cache Pentium MMX The caches are bigger, each with a Translation Lookaside Buffer (TLB) which convert the address codes used by the caches to a kind that the processor can use.

5. Pentium MMX unit The MMX unit does 57 functions for multimedia. It uses some of the registers in the FPU, which are bigger than the ones in the ALU’s. This allows the MMX unit to function faster than the main processor. Branch Predictor Unit 8K Code Cache Instruction Prefetch Buffer & Decode Unit BIU Bus Interface Unit Floating Point Unit MMX ALU ALU Registers To RAM 8K Data Cache

6. The Pentium Pro Processor • Designed to minimize downtime of the processor, thereby speeding up the CPU. • Adds a Level 2 Cache. • Adds a BTB. • Adds a ROB.

7. The Pentium Pro Level 2 Cache The L2 Cache is another way to have data immediately available for the processor. 8K L1 I-Cache SB Branch Target Buffer RU JEU BIU ROB IPB & Decode Unit ALU FPU ALU 8K L1 D-Cache L2 Cache D/E

8. The Pentium Pro ROB The ROB is like a pool for processing. 8K L1 I-Cache SB Branch Target Buffer RU JEU BIU ROB IPB & Decode Unit ALU FPU ALU 8K L1 D-Cache L2 Cache D/E

9. Pentium II Processor • Combines the MMX technology with the Pro setup. • The L2 Cache, however, is not integrated into the CPU in the same way.

10. The Pentium II L2 Cache The L2 relocation is cheaper to make, but creates a slower connection to the processor. 16K L1 I-Cache SB Branch Target Buffer RU JEU BIU ROB IPB & Decode Unit ALU MMX ALU L2 Cache FPU 16K L1 D-Cache D/E

11. The Pentium II L1 Caches This is compensated for by increasing the L1 caches to 16K. 16K L1 I-Cache SB Branch Target Buffer RU JEU BIU ROB IPB & Decode Unit ALU MMX ALU L2 Cache FPU 16K L1 D-Cache D/E

12. The Pentium II MMX module The Pentium II also has the MMX module near the FPU. 16K L1 I-Cache SB Branch Target Buffer RU JEU BIU ROB IPB & Decode Unit ALU MMX ALU L2 Cache FPU 16K L1 D-Cache D/E