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Low Power Design in CMOS

Low Power Design in CMOS. Why worry about power? -- Heat Dissipation. microprocessor power dissipation. source : arpa-esto. DEC 21164. Evolution in Power Dissipation. Why worry about power — Portability. Where Does Power Go in CMOS?. Dynamic Power Consumption.

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Low Power Design in CMOS

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  1. Low Power Design in CMOS

  2. Why worry about power?-- Heat Dissipation microprocessor power dissipation source : arpa-esto DEC 21164

  3. Evolution in Power Dissipation

  4. Why worry about power — Portability

  5. Where Does Power Go in CMOS?

  6. Dynamic Power Consumption

  7. Dynamic Power Consumption - Revisited

  8. Power Consumption is Data Dependent

  9. Transition Probabilities for Basic Gates

  10. Transition Probability of 2-input NOR Gate

  11. Problem: Reconvergent Fanout

  12. How about Dynamic Circuits?

  13. 4-input NAND Gate

  14. Transition Probabilities for Dynamic Gates

  15. Glitching in Static CMOS

  16. Example 1: Chain of NOR Gates

  17. Example 2: Adder Circuit

  18. How to Cope with Glitching?

  19. Short Circuit Currents

  20. Impact of rise/fall times on short-circuit currents

  21. Short-circuit energy as a function of slope ratio

  22. Static Power Consumption

  23. Leakage

  24. Sub-Threshold in MOS

  25. Power Analysis in SPICE

  26. Design for Worst Case

  27. Reducing Vdd

  28. Lower VddIncreases Delay

  29. Lowering the Threshold

  30. Transistor Sizing for Power Minimization

  31. Transistor Sizing for Fixed Throughput

  32. Reducing Effective Capacitance

  33. Summary

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