1 / 33

Operating Systems (OS)

Operating Systems (OS). Memory Management II. Outline. Basic Memory Management (Lecture MM I) Memory management problems Memory management and multitasking Free memory management Virtual Memory (Lecture MM II) Paging Page faults Page eviction strategies (Segmentation).

varana
Télécharger la présentation

Operating Systems (OS)

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Operating Systems (OS) Memory Management II

  2. Outline • Basic Memory Management (Lecture MM I) • Memory management problems • Memory management and multitasking • Free memory management • Virtual Memory (Lecture MM II) • Paging • Page faults • Page eviction strategies • (Segmentation)

  3. Lecture Objectives • Paging (and Segmentation) • Techniques • Differences • Difference between Pages and Frames • Page Tables and Page Faults

  4. Process address space 0 P1 00008abe <_E>: 8abe: 79 00 00 05 79 00 00 05 mov.w #0x5 8ac2: 55 02 55 02 bsr .+2 (8ac6) 00008ac4 <.ef>: 8ac4: 54 70 54 70 rts 00008ac6 <_E_sub>: 8ac6: 19 11 19 11 sub.w r1,r1 8ac8: 1d 01 1d 01 cmp.w r0,r1 8aca: 4e 20 4e 20 bgt .+32 (8aec) Code Data 00008dea <___data>: 8dea: ff ff ff ff 00008dec <_ExecTask>: ... 00008dee <_ticks>: 8dee: ff ff ff ff 00008df0 <_x>: ... 00008df2 <_y>: 8df2: 8d 44 8d 44 m PROCESS

  5. Memory Hierarchy REGS CACHE PRIMARY MEMORY DISK

  6. MM Problems • Ability of memory relocation – address binding • Fragmentation • Physical limits of memory size • Dynamically growing and shrinking memory

  7. Large processes • What happens when a process does not fit in memory? • Overlays • Programmer divides process into individual components that can be swapped in and out of memory • Very hard to keep track of what needs to be in memory at different times in the execution • Virtual memory, implemented using: • Paging • Segmentation

  8. Virtual memory (VM) • Hides physical aspects of memory from the user • The virtual memory is a logical consecutive sequence of bytes from the user’s point of view • Ideal goal: • Every process starts at address 0 • Every process has ”unlimited” amount of memory • Only parts of the virtual memory is present in the physical memory at any given time.

  9. Virtual memory (VM) • Hides physical aspects of memory from the user • The virtual memory is a logical consecutive sequence of bytes from the user’s point of view • Only parts of the virtual memory is present in the physical memory at any given time.

  10. Virtual memory (VM) • How does this work? • Two-level (PM, SM (disk)) structure. • Motivations for VM • Large parts of programs are rarely used • Error handling routines • Vectors and arrays allocate more memory than they need • What can be gained using VM? • Programs are less restricted by memory size • More processes can be executed in parallel • Less I/O for loading and swapping

  11. Virtual memory using paging • Allows non-contiguous memory allocation • Basic technique: • Physical memory is divided into fixed-size units, called frames • Virtual (logical) memory is divided into equal-sized units, called pages • Page tables are used for translation from logical to physical addresses • At execution-time, the needed pages of a process is loaded into free frames in memory

  12. Virtual Memory The CPU sends virtual addresses to the Memory Management Unit (MMU) CPU Secondary Memory Primary Memory MMU Disc Controller Bus The MMU sends physical addresses to the memory

  13. Page tables • A page table translates from a logical address to a physical address • Each process has its own page table • Problem: How to store Page Tables? (Fast & Large) • The page table can be put in: • The MMU • A set of small fast registers • Memory (slows down memory access significantly) • The part of the page table that is currently used can be put in specialised registers (TLB:s = Translation lookaside buffers)

  14. Page Tables Virtual Address Space 60k-64k X Virtual Page 56k-60k X 52k-56k X 48k-52k X 44k-48k Physical Memory Addresses 7 40k-44k X 36k-40k 5 32k-36k X 28k-32k 28k-32k X 24k-28k 24k-28k X 20k-24k 20k-24k 3 16k-20k 16k-20k 4 12k-16k 12k-16k 0 8k-12k 8k-12k 6 4k-8k 4k-8k 1 0k-4k 0k-4k 2 Frame Page

  15. Paging example 0 0 PAGE TABLES x z PROCESS A PROCESS B 0 PHYSICAL MEMORY y PROCESS C VM (ON DISK) NOTE: One page table per process!!!!!!

  16. Logical addresses Page 4 Offset 836 0 01101000100 000100 Page number Page number Page offset offset • Each logical address contains: • A page number, telling us on what page the data can be found • A page offset, telling us where on that page the data can be found Page Size 2k 64 Pages 63 Process address space

  17. Page table address translation 01101000100 000100 Page Frame 01101000100 110110 000000 X 000001 X 000010 100101 000011 X 000100 110110 000101 X 000110 X 000111 X 001000 001011 Page table Physical memory

  18. Paging fragmentation • Paging eliminates the possibility of external fragmentation • We get an internal fragmentation of approximately ½ page per process

  19. Page loading • Pages areloadedintophysicalmemoryframes as theyareneeded by the process • The page table uses a bit (validbit) for each page toindicateifthat page is in memory or not • If a requested page is not in memory, a page fault is generated • Trapto operating-system whichhandlethis.

  20. Page fault handling • A page fault handling sequence: • Find the requested page on the disk • If there is free frame space in memory, jump to 4. • If not, • Choose a page to evict from memory • Adjust the page table entry for the evicted page • If the evicted page is altered, write it to disk • Load the requested page • Adjust the page table • Let the process scheduler decide what happens next

  21. Page eviction strategy • We need some strategy when deciding which pages to evict • FIFO (First In First Out) • The page in memory that was first loaded, is evicted • LRU (Least Recently Used) • The page in memory that was least recently used, is evicted • OPT (Optimal) • The page in memory that will not be accessed for the longest period of time, is evicted

  22. FIFO example Time 0 1 2 3 4 5 6 7 8 9 10 Requests c a d b e b a b c d 0 a a a a a e e e e e d 1 b b b b b b b a a a a Memory frames 2 c c c c c c c c b b b 3 d d d d d d d d d c c Faults

  23. LRU example Time 0 1 2 3 4 5 6 7 8 9 10 Requests c a d b e b a b c d 0 a a a a a a a a a a a 1 b b b b b b b b b b b Memory frames 2 c c c c c e e e e e d 3 d d d d d d d d d c c Faults

  24. OPT example Time 0 1 2 3 4 5 6 7 8 9 10 Requests c a d b e b a b c d 0 a a a a a a a a a a a 1 b b b b b b b b b b b Memory frames 2 c c c c c c c c c c d 3 d d d d d e e e e e e Faults

  25. FIFO - Belady’s anomaly Time 0 1 2 3 4 5 6 7 8 9 10 11 12 Requests a b c d a b e a b c d e 0 a a a a d d d e e e e e e Frames 1 b b b b b a a a a a c c c 2 c c c c c c b b b b b d d Faults 0 a a a a a a a e e e e d d 1 b b b b b b b b a a a a e Frames 2 c c c c c c c c c b b b b 3 d d d d d d c c c Faults Not always better performance with more frames…

  26. CPU utilization Thrashing Thrashing Sometimes the CPU spends more time handling page faults than doing useful work. This situation is denoted thrashing. • Methods for thrashing avoidance: • Working set model • Page fault frequency • Prepaging

  27. Page properties • Page size • Small pages minimize number of page faults • Large pages reduce total I/O • I/O locks (2 solutions) • Never do I/O to user memory (store I/O data in OS buffers) • Allow locking of pages in memory • Page table size • Multilevel page tables • TLB usage • Small pages consume more TLB´s

  28. Virtual memory using segments PAGING SEGMENTATION Main CODE CODE Subr Struct1 DATA DATA Struct2 Array STACK STACK Process logical memory Process logical memory

  29. Segmentation From a programmer’s point of view, a program can be seen as a collection of logical units, such as: • Main program • Subroutines • Data • … and not as a sequence of consecutive bytes 01101000100 000100 Segment number Segment offset

  30. Segment table address translation TRAP 000100 01101000100 < + Limit Base 110110 01101000100 X X 000000 X X 000001 10101001100 100101 000010 X X 000011 11000011010 110110 000100 X X 000101 X X 000110 X X 000111 00000011001 001011 001000 Segment table Physical memory

  31. Segmentation issues • Fragmentation • No internal fragmentation, but external, which calls for compaction • Memory management • Segments can be of variable size • Segmentation requires allocation algorithms, such as first fit, best fit or worst fit, to allocate memory for the segments

  32. Segmentation combined with paging • Combines the good properties of segmentation (nice handling of logical memory space) with those of paging (nice handling of physical memory space) • Each segment is divided into pages • The segment number is used as an index in segment-table, which gives base address to page table • Segment number is then divided into page number and page offset • Physical address is read from the page table in the usual manner • Only internal fragmentation • Might require up to 3 memory accesses per operation (read segment table – read page table – read memory)

  33. Lecture Objectives Revisited • Paging and Segmentation • Techniques • Differences • Difference between Pages and Frames • Page Tables and Page Faults

More Related