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The Great I2C Mystery Act 2

The Great I2C Mystery Act 2. The facts. Occasionally, when accessing sequentially components on the I2C bus (LLD, DCU etc.), the APVs are found not to respond correctly to I2C commands, actually they are stuck

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The Great I2C Mystery Act 2

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  1. The Great I2C MysteryAct 2

  2. The facts • Occasionally, when accessing sequentially components on the I2C bus (LLD, DCU etc.), the APVs are found not to respond correctly to I2C commands, actually they are stuck • This can data pattern dependent (as the last bit of the data sequence is the one most often misinterpreted) • The lock-up can only be cleared by Resetting the APV

  3. The theoretical waveforms Ack Cycle D0 D1 SCL Driven always by master SCL SDA ↓ must occur after SCL ↓ SDA SDA Driven by master Driven by slave Example for an I2C write cycle

  4. The actual waveforms Ack Cycle D0 D1 SCL SCL ↓ before SDA↓ by a few ns SDA Driven by master Driven by slave

  5. … on scope SDA SCL on FE-Hybrid

  6. What we believe the APV believes Ack Cycle D0 D1 SCL (large RC) ARRRGGGHHHH!!!!! SDA (small RC) Driven by master Driven by slave

  7. Present Electrical circuit FE-Hybrid 82W Parasitic on FE Hybrid CH SCL SDA AOH CH > CA Parasitic on AOH CA 82W

  8. Why were resistors added? CCU APV FE Hybrid FE Hybrid CCUM PSU CNTRL PSU FE

  9. Why are resistors added ? (2) To FE PSU, but Floating at Power-Up To CNTRL PSU Any logic line between control and FE CCU

  10. “Simple” Circuit equalization FE-Hybrid 82W SCL SDA AOH > 3 KW

  11. Possible solutions • Remove all protection resistors as to avoid different RC constants on ROD traces and introduce strict powering sequences • Use Wacek’s ~2 nF bypass capacitor on resistors as to speed-up slow RCs edges • Tune Rs on different I2C traces as to guarantee correct SCL arrival time • Remove all resistors and introduce active protection to avoid short circuiting the CCUs to the FE during power-up • Remove resistors (same as 1.) and use only one power supply for CCUMs and FE hybrids • Short circuit I2C (SCL and SDA) lines after protection resistors, thus “equalizing” delay paths to AOH and APVs

  12. Solution 1 FE-Hybrid Parasitic on FE Hybrid CH SCL SDA AOH Parasitic on AOH CA PSU Control PSU FE Simult.

  13. Solution 2 FE-Hybrid 82W Parasitic on FE Hybrid CH SCL SDA AOH Parasitic on AOH CA 82W PSU Control PSU FE before

  14. Solution 3 FE-Hybrid R1 Parasitic on FE Hybrid CH SCL SDA AOH R2 > R1 Parasitic on AOH CA R2

  15. Solution 4 FE-Hybrid Parasitic on FE Hybrid CH SCL SDA AOH Parasitic on AOH CA PSU Control PSU FE before

  16. Solution 5 FE-Hybrid Parasitic on FE Hybrid CH SCL SDA AOH Parasitic on AOH CA PSU Control PSU FE

  17. Solution 6 FE-Hybrid 82W Parasitic on FE Hybrid CH SCL SDA AOH Parasitic on AOH CA 82W PSU Control PSU FE before

  18. Comparison

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