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Development of SiTCP: A High-Speed TCP/IP Processing Hardware for Front-End Devices

This paper presents the development of SiTCP, a dedicated TCP/IP processing hardware designed for front-end devices with constraints related to size, power consumption, and data transfer speeds. SiTCP offers high flexibility and connectivity through Ethernet technologies, achieving a line utilization ratio of around 95%. Implemented on an FPGA, it operates at a low power level of less than 730 mW. We detail the implementation, measurement setups, and test results, demonstrating that SiTCP meets the performance needs essential for modern front-end systems.

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Development of SiTCP: A High-Speed TCP/IP Processing Hardware for Front-End Devices

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  1. Development of a TCP/IP Processing Hardware 1,2) Tomohisa Uchida and 2)Manobu Tanaka 1) University of Tokyo, Japan 2) High Energy Accelerator Research Organization (KEK), Japan N33-6 NSS2006

  2. Outline • Introduction • Advantages using network technologies • Why we did develop? • Implementation • A test board. • Measurement • Transfer Speed. • Power Consumption. • Conclusion We call the hardware SiTCP. N33-6 NSS2006

  3. Introduction • There are advantages using Network technologies. • High Flexibility, • High Connectivity, • Various Commodity Products, • Standard OSs Support Standard Protocols, • Easy Maintenance. • It is essential in back-end systems It has not been sufficiently adopted in front-end systems. N33-6 NSS2006

  4. Why did we develop ? • Front-end devices have constraints; • Small Hardware size, • Low Power-Consumption, • High Speed Data-Transfer. We Tried to adopt it but Encountered Problems. In Order to Satisfy These Constraints, We Have Developed SiTCP. N33-6 NSS2006

  5. Features • Small Hardware size • Implemented on an FPGA • Small Power Consumption • < 730mW • System Clock is 25MHｚ with 100BAST-T. • High Transfer-Speed • Line Utilization of TCP data is about 95%. • Reach to The Theoretical Limit. • Simple External Interface • Like a Sync. FIFO-Memory-device. N33-6 NSS2006

  6. Implementation In order to measure performance, We developed a Test board. Ethernet PHY SMSC LAN83C185 FPGA SiTCP on It Xilinx XC3S500E RJ45 ~2,000 Slices (40% logic resources) are used Test Board Small Size N33-6 NSS2006

  7. Block Diagram of the FPGA Test-Data Generator SiTCP Tx data MII Test-Data Checker Rx data Test data are incremental numbers. MII (Media Independent Interface) is specified by IEEE802.3. N33-6 NSS2006

  8. Measurement • Confirmed capability to communicate a PC • Using a Linux OS. • With a Simple Application Program • Using Standard SOCKT() functions • Receiving only • Measured Transfer Speed • From a SiTCP (Test board) to a PC N33-6 NSS2006

  9. MeasurementSetup ACK # Logger ACK # Extractor RS232C Extracts TCP ACK #s from packets Send The Last TCP ACK # Every 200 ms A Packet is copied and Forwarded to The Extractor. Tap Generates Test Data RX-PC 100BASE-T LINUX 2.4 N33-6 NSS2006 Test Board

  10. Calculate Line Utilization • Transfer Speed • Calculate from logged ACK #s • ACK # is logged every 200 ms. • Utilization Ratio = Transfer-Speed / 100 Mbps (100BASE-T is employed) N33-6 NSS2006

  11. Result Reaches The Theoretical Limit Theoretical Limit Utilization Ratio (%) Power Consumption < 730 mW (The whole board) N33-6 NSS2006

  12. Conclusion We have developed the TCP/IP processing hardware (SiTCP). • Enough Performance for Front-end Devices • High-Speed Data Transfers • 95% (Line Utilization of TCP data) • Small Hardware Size • 41% logic resources are used of XC3S500E • Low Power Consumption • < 730 mW (The Whole Board) SiTCP enables Front-end devices to adopt Network-technologies. N33-6 NSS2006

  13. Supplemental Slides N33-6 NSS2006

  14. Sequence Number All Data of TCP are numbered by a sender. Data SN=2015 Data SN=2016 A TCP packet Data SN=2017 Sending Order Data SN=2018 Data The sender sent a SN of first data. SN=2019 Data SN=3050 SN=3051 N33-6 NSS2006

  15. Acknowledge Number Data SN=2015 The Receiver is Expecting Data SN=2016 A TCP packet Data SN=2017 Receiving Order Check the SN. Data SN=2018 Data SN=2019 The Receiver sent back the expecting next SN As ACK #. Data SN=3050 SN=3051 ACK # = 3051 N33-6 NSS2006

  16. MeasurementSetup ACK # Logger ACK # Extractor RS232C Extract TCP ACK #s from RX-PC packets Send a TCP ACK # Every 200 ms A Packet is copied and Forwarded to The Extractor. Tap Generates Test Data RX-PC 100BASE-T LINUX 2.4 N33-6 NSS2006 Test Board

  17. Transfer Capability TestTransfer Rates of Both Directions • Measured Transfer Speed • Between SiTCPs • Both directions • Simultaneously N33-6 NSS2006

  18. Capability TestTransfer Data of Both Directions ACK # Logger RS232C ACK # Extractor X 2 Ethernet Tap TCP Server 100BASE-T TCP Client N33-6 NSS2006

  19. Line Utilization between SiTCPs Avg. Utilization ~ 95% (95 Mbps) Stable Server→ Client Client → Server N33-6 NSS2006

  20. Comparison toA Standard Implementation • An Standard Implementation • Using an FPGA • Protocols are processed • on an FPGA, • Using an Embedded CPU, • With a Standard OS • Linux • SUZAKU board • One of the standard implementations. N33-6 NSS2006

  21. SUZAKU board • A Product of Atmark Techno Inc. ,Japan • FPGA • XC3S1000 (Xilinx Inc.) • CPU • Microblaze, Xilinx Inc. • Embedded in an FPGA • uClinux Consists of an FPGA, an Ethernet Controller chip, a Flash Memory, a DRAM. N33-6 NSS2006

  22. Setup ACK # Logger ACK # Extractor RS232C Ethernet Hub Ethernet Tap 100BASE-T RX PC N33-6 NSS2006 SUZAKU board

  23. Utilization Ratio Max. Utilization ~ 3% Utilization Ratio (%) N33-6 NSS2006

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