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2004 ITRS Factory Integration

2004 ITRS Factory Integration. Europe Arieh Greenberg, Infineon Richard Oechsner, Fraunhofer IISB George Horn, Middlesex Industries Japan Michio Honma, NECEL Shige Kobayashi, Renesas US Mani Janakiram, Jeff Pettinato and Dev Pillai, Intel. FTF Meeting@ Stresa, Italy

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2004 ITRS Factory Integration

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  1. 2004 ITRS Factory Integration Europe Arieh Greenberg, Infineon Richard Oechsner, Fraunhofer IISB George Horn, Middlesex Industries Japan Michio Honma, NECEL Shige Kobayashi, Renesas US Mani Janakiram, Jeff Pettinato and Dev Pillai, Intel FTF Meeting@ Stresa, Italy April 18th, 19th and 20th 2004

  2. Factory Integration Focus • Integrate and align cross TWG issues with FI • Excellent cross TWG mtg. with FEP, Interconnect, Litho, YE, Metrology, Assy/Pkg, and Test • Technology node implications • Drive sophisticated factory-wide process control systems • Master complexity of high product mix through error free factory systems (Ex: recipe mgmt) • Implement pervasive standardized factory information infrastructure by 45nm • Key items: Integrated Metrology guidelines; Integrated AMHS; Advanced Process Control (APC) • Drive Airborne Molecular Contamination Control (AMC) • Next Generation (NG) litho factory implication • Equipment productivity; Facility req; Mask infrastructure; Contamination control • “Visual” manufacturing • Need metrics to cover various business models (Ex: SOC; DRAM, etc.) • Key metrics: Lot sizes; Cycle time (TAT); Energy consumption, etc.

  3. Cross-Cut TWG Discussion

  4. Start Next Wafer Size (450mm) Research in 2005 to Validate Assumptions • Key Assumptions that Must be Validated • 450mm Wafer Size? • 2013 High Volume Production Start? • Design for 20k wspm Fab? • Start Research in 2005? You Are Here! 300mm 400mm 450mm 500mm One Question: Carrier & AMHS Strategy High One of Many Questions that Must be Answered 300mm Reuse Very Low What are the key questions that must be answered to drive research in 2005?

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