1 / 14

CTL - Redundancy

CTL - Redundancy. Discussions – February 28, 2007. Memory Test. Fail Data. Repair Data ATE / BISA. STIL / CTL. Meeting Minutes - 1. Should CTL provide repair data as well? This could imply repair waveforms and provide data Used to describe repair data/mechanism post-analysis.

cairo-odom
Télécharger la présentation

CTL - Redundancy

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. CTL - Redundancy

  2. Discussions – February 28, 2007

  3. Memory Test Fail Data Repair Data ATE / BISA STIL / CTL Meeting Minutes - 1 • Should CTL provide repair data as well? • This could imply repair waveforms and provide data • Used to describe repair data/mechanism post-analysis. • Conclusion : Yes

  4. Repair column for green columns Repair column for blue columns Repair Column Meeting Minutes - 2 • Mechanism to define physical map for redundancy • Memory topology does not define repair columns. • Redundancy may be restricted to specific columns

  5. Meeting Minutes - 3 • Should CTL support repair verification? • Insert fault and then apply repair to verify. • Concluded to be in the domain of behavioral model. CTL cannot be used for verification. • Conclusion : No

  6. Meeting Minutes - 4 • Need mechanism to support fuse-cell within memory. • Would require definition of Power signals as well. • New pin properties / functions.? • PROM (Programmable ROM) • Consists of fuse-cells. • Access Mechanism? Conclusion : need confirmation from memory vendors.

  7. Further Actions • Repair information in CTL • LV design (Saman) • Synopsys design (Slimane)

  8. Discussion Slides – feb 28

  9. Repair Type • Internal fuse • electric • External fuse • ECC / EDAC • Correction bits

  10. Repair Access • Serial • Serial data shift • Parallel • Parallel data write • Address map • Word oriented repair

  11. Repair Data • Repairable Rows / Columns • Number of Repairable Rows • Size of row bank • Number of Repairable columns • Size of column bank • Number of repairable bits

  12. Repair Configuration • Fuse Cell Organization • Column address bits • Row address bits • Mapping to physical rows &columns • Offsets.

  13. Internal • Voltage Signals • Must for fuse within memory • Repair register reset • Need to treat differently?

  14. Meeting Notes

More Related