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Redundancy - CTL

Redundancy - CTL. Value Range for DataBitMap. Rows 0 thru 511. Bit 0. Bit 63. Memory Description. No column multiplexing Split into two banks left bank is 64 bits right bank is 288 bits Two spare column one for each left bank and right bank

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Redundancy - CTL

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  1. Redundancy - CTL Value Range for DataBitMap

  2. Rows 0 thru 511 Bit 0 Bit 63 Memory Description • No column multiplexing • Split into two banks • left bank is 64 bits • right bank is 288 bits • Two spare column • one for each left bank and right bank • Can repair any one column in respective bank Bit64 Bit 319

  3. Block Diagram Q A D CLK FAL REL FAR RER

  4. CTL (using Slimane’s proposal) Signals { “Q”[319..0] Out; “A”[8..0] In; “D”[319..0] In; “CLK” In; “RER” In; “FAL”[5:0] In; “REL” In; “FAR” [8:0] In }

  5. CTL .. contd Environment “myStrangeMemory” { CTL { RER { DataType RepairEnable {ActiveState ForceUp;}} FAR[5..0] {DataType RepairDataBit; { ValueRange 0 63; } } REL { DataType RepairEnable {ActiveState ForceUp;}} FAL[8..0] {DataType RepairDataBit; { ValueRange 0 287; }} } }

  6. CTL .. contd MemoryProperties { SimultaneousReadWrite None: ColumnMultiplexing 16: TopologicalOrg Adjacent; } MemoryRepair{ RepairResource Column1 { RepairType Column; AccessSignals ‘REL + FAL[5..0]’ Width 1 AddressMap xxxxxxxxxx /* Not required */ DataBitMap 0_00rr_rrrr /* Works well all values from 0  63*/ } RepairResource Column2 { RepairType Column; AccessSignals ‘RER + FAR[8..0]’ Width 1 AddressMap xxxxxxxxxxxxxx DataBitMap r_rrrr_rrrr /* No mapping available for bit range 64  319 */ }

  7. Discussion • Need two fields • Valid value range for the control pins / bits. • valid value range for DataBitMap to use the repair resource • Alternatively bit-wise representation for DataBitMap

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