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Introducing the Xilinx Spartan Series

Introducing the Xilinx Spartan Series. High Performance, Low Cost FPGAs with on-chip SelectRAM Memory. Xilinx Spartan Series FPGAs. Advanced Process Technology. Xilinx 4000 Heritage. >80 MHz Performance On-chip SelectRAM Software and cores. Smallest die size. Low packaging cost

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Introducing the Xilinx Spartan Series

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  1. Introducing the Xilinx Spartan Series High Performance, Low Cost FPGAs with on-chip SelectRAM Memory

  2. Xilinx Spartan Series FPGAs Advanced Process Technology Xilinx 4000 Heritage >80 MHz Performance On-chip SelectRAM Software and cores Smallest die size Low packaging cost Low test cost Total Cost Management

  3. Xilinx Spartan Families • Complete High Volume FPGA Solution • Spartan: 5 Volt with up to 40K System Gates • SpartanXL: 3.3 Volt with up to 40K System Gates • Xilinx Alliance and Foundation Software • Process technology leap • XC4000 heritage • Most successful FPGA architecture • No compromises • Performance, RAM, Cores & Low Price

  4. Advanced Process core-limited pad-limited Core Core I/O pads I/O pads I/O count determines die size Gate count determines die size Spartan Die Size for High I/O package Nearly Equivalent to Gate Arrays

  5. SpartanXL Family Advanced 0.35m Process All other features 0.25 - small size - low capacitance - performance - low power Transistor gates 0.35 - allows 3.3 V supply Chip Combines 3.3 V operation with 0.25 benefits

  6. Xilinx Spartan Series • Xilinx has changed the rules! • No more compromises • Gates-only solutions are no longer required • Spartan Series delivers key ASIC requirements with all the FPGA advantages • Performance • On-chip SelectRAM Memory • Cores • Low price The industry’s BEST high volume FPGA solution!!

  7. Xilinx Spartan Series 5 Volt -> XCS05 XCS10 XCS20 XCS30 XCS40 3.3 Volt -> XCS05XL XCS10XL XCS20XL XCS30XL XCS40XL System Gates 2K-5K 3K-10K 7K-20K 10K-30K 13K-40K Logic Cells 238 466 950 1368 1862 Max Logic Gates 3,000 5,000 10,000 13,000 20,000 Flip-Flops 360 616 1120 1536 2016 Max RAM bits 3,200 6,272 12,800 18,432 25,088 Max Avail. I/O 77 112 160 192 205 Performance 80MHz 80MHz 80MHz 80MHz 80MHz No Compromises: Performance, RAM, Cores, and Low Price

  8. Spartan Naming • Spartan part name uses “System Gates” • Includes both RAM and Logic • High end of current published gate range • Matches ASIC industry terminology • Consistent with future FPGA families XCS##XL-3PC84C XL = 3.3 Volt no XL = 5 Volt XCS = Spartan ## = System Gates

  9. Spartan Series Footprint Compatibility • Highest volume ASIC plastic packages • Footprint compatible in common packages 5 Volt XCS05 XCS10 XCS20 XCS30 XCS40 3.3 Volt XCS05XL XCS10XL XCS20XL XCS30XL XCS40XL PC84 PC84 VQ100 VQ100 VQ100 VQ100 TQ144 TQ144 TQ144 PQ208 PQ208 PQ208 PQ240 PQ240 BG256 BG256

  10. Pinout Compatibility • Complete pinout compatibility within Spartan Series • Not directly pinout-compatible with XC4000/XC5200 • Differences in Mode pins • Spartan PQ208 pinouts optimized to add additional I/O

  11. Spartan Speed Grades • Higher speed grade = higher performance XL-5 XL-4 E-1 -4 E-2 -3 Performance -3 -4 5200 4000E Spartan SpartanXL

  12. Spartan Series Meets ASIC Requirements:Price and Performance FPGAs with RAM Spartan Series Fills the FPGA Price-Performance and RAM “Gap” FPGAs without RAM Price ASIC Speed, IP/Core Support

  13. Spartan Series Meets ASIC Requirements:Cores/IP and RAM • Use of Memory in ASICs grew from 65% in 1995 to 78% in 1997 ASIC IP/CORE Usage Many CORES require RAM (PCI, DSP, USB, etc.) Source: Dataquest

  14. Spartan Series Meets ASIC Requirements:Low Price Cost of Ownership Per Unit ($) • FPGA Cost of Ownership Advantage • No test vectors required • Limited or no simulation • Automatic Place and Route • Re-spins in hours not months • Faster Time-to-Market • No NRE 10x Lost Opportunity NRE Development Cost Development Cost 2x 1x Unit Cost Unit Cost ASIC FPGA

  15. Total Cost Management • Leading edge process technology • Smallest die size of any FPGA with on-chip RAM • Focused package offering • Low-power architecture allows use of highest volume plastic packages • Streamlined test flow • Lower cost test hardware • Built-in self test features and shorter test times • Optimized manufacturing flows

  16. Total Cost Management Relative Cost 1993 4 Assembly Test 3 1995 Silicon Majority of cost is back end (assembly, test, overhead) Spartan Series die are pad limited 1996 2 1997 1 0 Advanced 0.6m FPGA 0.6m FPGA 0.5m FPGA 2LM 3LM 3LM 0.5m FPGA Spartan Series addresses all aspects of cost

  17. 1997 1998 1999 2000 2001 2002 Priced for High-Volume Leadership 200K • New Applications • Set Top Box • DVD • Digital Camera • PC Peripherals • Consumer Electronics 100K Density (System Gates) 60K 100K 60K 25K 40K 10K Gates/$ in 2002! 15K 100K unit volume price projections

  18. SpartanXL Family Available Now • -5 speed grade available in Q2 ‘99 • SpartanXL software support in 1.5 or later SpartanXL (3.3V) Production XCS05XL Now XCS10XL Now XCS20XL Now XCS30XL Now XCS40XL Now

  19. Mid-99 System Logic Volume Pkg Gates Cells Price* XCS05XL PC84 5,000 238 $2.95 XCS10XL PC84 10,000 466 $4.45 XCS20XL VQ100 20,000 950 $5.45 XCS30XL VQ100 30,000 1368 $6.95 XCS40XL PQ208 40,000 1836 $9.90 SpartanXL Family Pricing Under $3 for 5,000 Gates!! *100Ku minimum volume, slowest speed grade

  20. SpartanXL Family Voltage Compatibility 5V • Spartan inputs accept 5V signals • Spartan outputs drive standard TTL • 100% compatible in 5 volt environment 3.3V Any 5 V device 5V SpartanXL FPGA Advanced 0.35 3.3V Core 3.3V I/O 3.3V Meets TTL Levels

  21. Without Compromises Pricing competitive with ASICs High Performance On-chip SelectRAMTM PCI LogiCORE + AllianceCORE FPGA Price Leadership Higher Speed Lower Power Power Down Mode Spartan $395 per 5K gates SpartanXL $295 per 5K gates 0.5 3LM Higher Density + More Features 5 Volt Price SpartanII up to 100K gates Spartan Next Generation up to 200K gates 0.35 5LM 3.3 Volt 0.25 5LM 0.18 2.5 Volt 1.8 Volt 1998 1999 2000 *Prices are for 100K units, slowest speed, lowest cost package

  22. Spartan CLB • 2 4-input LUTs and 1 3-input LUT • 2 edge-triggered FFs

  23. Spartan IOB

  24. Single-Port RAM • Synchronous write, asynchronous read • 16x2 or 32x1 max per CLB

  25. Dual-Port RAM • One common synchronous write port • Two asynchronous read ports • 16x1 max per CLB

  26. Supported RAM Modes • Per CLB: 16 x 1 16 x 2 32 x 1 Edge- Triggered Timing Single- Port X X X X Dual- Port X X

  27. RAM Provides 16X the Storage of Flip-Flops • 32 bits vs. 2 bits of storage • 32x8 shift register with RAM = 11 CLBs • Using flip-flops, takes 128 CLBs for data alone CLB CLB D1 32 bits 2 bits D1 D Q Q1 A0 O1 A1 A2 D2 D Q Q2 A3 A4 CLK WE

  28. Software Support for Spartan Rev. Software Capability 1.5/1.5i Spartan Libraries X SpartanXL Libraries X Spartan Implementation X Spartan Speed File X SpartanXL Implementation X SpartanXL Speed File FTP

  29. XC4000E Library Components Not Allowed in Spartan • No Asynchronous RAM • No RAM16X1, RAM32X1 • Only RAM16(32)X1S, RAM16X1D, ROM16X1 • No Edge Decoders • No DECODEx • No Wired-AND • No WANDx or WOR2AND • Mode Pins Not Usable as I/O • No MD0, MD1, MD2

  30. New Features in SpartanXL Family • Higher speed (-4/-5) • 8 flexible global low-skew buffers (BUFGLS) • CLB latches • Input Fast Capture Latch • Output multiplexer or lookup table • 3.3V supply for low power with 5V tolerance • Programmable 3V input clamp for 3V PCI • Programmable 24 mA output drive for 5V PCI • Power-down pin • Improved boundary scan • Express parallel configuration mode

  31. Costs Less Than Standard ICs $20 * Supported devices: XCS20XL XCS30XL XCS40XL External PLD7K Gates $15 Standard ChipPCI Master I/F Component cost 100K units $10 XCS20XL-4 TQ144* $5 7K Gates Logic Power by PCI Master I/F Standard Chip Solution <$7

  32. CORE Solutions XCS30XL Percentage of Effective Core Function Price Device Used Function Cost UART $6.95 17% $1.30 16-bit RISC Processor $6.95 36% $2.60 16-bit, 16-tap $6.95 27% $2.00 Symmetrical FIR Filter Reed-Solomon Encoder $6.95 6% $0.50 LogiCORE PCI32 Spartan $8.25 45% $3.80 (in PQ208) *Prices are for 100K units, plastic package

  33. Spartan Advantages Over Altera Flex 6K/10K • SelectRAM • Cores • PCI and DSP LogiCORE • AllianceCORE • Density • Five devices at both 3.3V and 5V • Performance • 12% faster

  34. Flex 6000 = Lower Price Replacement for 8K Based upon 1994 XC5200 technology Positioned as “first” Gate Array replacement FPGA Altera Flex 6000 6000 Advantages Improved Flex 8K routing Less expensive than 10K Equivalent performance to 8K Faster than XC5200 6000 Disadvantages Limited devices available today No RAM, no I/O Flip-Flops Limited footprint compatibility Slower than Spartan/XC4000 Non-Segmented Interconnect Limited software support

  35. System Features Comparison

  36. 5 devices for 5V and 5 devices for 3.3V Only 1 device for 5V, 3 devices for 3.3V Spartan Series vs. Altera 6000/A * A logic cell is a 4 input Look up table and a Flip-Flop ** XL and A represent 3.3V devices for Xilinx and Altera respectively

  37. 5 devices for 5V and 5 devices for 3.3V Only 2 low density 3.3V devices Spartan Series vs. Altera 10K * A logic cell is a 4 input Look up table and a Flip-Flop ** XL and A represent 3.3V devices for Xilinx and Altera respectively

  38. Xilinx Footprint Compatibility Leadership vs. FLEX 6K/A 5 Volt 3.3 Volt BG256 PQ240 PQ208 TQ144 VQ100 PC84 S05 S10 S20 S30 S40 S05XL S10XL S20XL S30XL S40XL 6010A 6016A 6024A 6016 Spartan Altera 6K SpartanXL Altera 6KA

  39. Xilinx Footprint Compatibility Leadership vs. FLEX 10K/A 5 Volt 3.3 Volt BG356 BG256 PQ240 PQ208 TQ144 VQ100 PC84 S05 S10 S20 S30 S40 S05XL S10XL S20XL S30XL S40XL 10K10 10K20 10K30 10K10A 10K30A Spartan Altera 10K SpartanXL Altera 10KA

  40. SpartanXL Provides Lowest Power K Factor 5.0V SpartanXL K Factor = 11 2.5V 3.3V

  41. No Compromises • High Performance • On-Chip SelectRAMTM • Wide range of IP and CORE solutions • PCI LogiCORE + AllianceCORE • Fully integrated software support • Volume Pricing competitive with ASICs Addresses the key needs of high volume logic users

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