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Rewiring for Threshold Logic Circuits and its Application to Combinational Equivalence Checking

Speaker: Pin-Yi Kuo Advisor: Chun-Yao Wang 2011/3/11. Rewiring for Threshold Logic Circuits and its Application to Combinational Equivalence Checking. Outline. Rectification Critical effect Connection method Simplification Simplification flow Weight decreasing Terminologies

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Rewiring for Threshold Logic Circuits and its Application to Combinational Equivalence Checking

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  1. Speaker: Pin-Yi Kuo Advisor: Chun-Yao Wang 2011/3/11 Rewiring for Threshold Logic Circuits and its Application to Combinational Equivalence Checking

  2. Outline • Rectification • Critical effect • Connection method • Simplification • Simplification flow • Weight decreasing • Terminologies • Experiment • Verification • Experimental results • Future work • Introduction • Rewiring • Rewiring flow • Preliminary • Assumption • Preprocess • Grouping • Target wire removal • Useless threshold gate • Useless threshold group • Critical input • Useless input

  3. Threshold Logic (1/2) • A threshold function f is a multi-input function defined as below: y = 1 if 0if n binary inputs x1, x2, … ,xnwith weights w1, w2, … ,wn a single binary output y a threshold value T δon and δoffrepresent the defect tolerance δon and δoffare both assumed to be zero in much research x1 x2 xn w1 w2 wn T f … …

  4. Threshold Logic (2/2) • An example of threshold logic network and its corresponding Boolean representation.

  5. Assumption • Every Boolean function has infinitely distinct representations in TL. • In our work, the threshold logic is generated with ILP-based tools. • For convenience, we assume the weights and threshold of a threshold function are positive integers. • Negative integers can be transformed into positive ones.

  6. ILP-based Synthesis • Integer linear programming • ILP formulation whichdescribes its functionality as linear relationships searches thepolytope vertices to find a point where the function has a smallest(largest) value. • Linear programs are problems that can be expressed in canonical form. • Threshold logic synthesis • Minimize the summation of input weights and the threshold value. • An input weight ranges from 1 to T after Positive-Negative Weight Transformation.

  7. Example f = a + bc 3 2 4 2 f 3 2 1 5 3 3 2 1 1 3 1 1 a b c a b c a b c a b c f f f Not ILP-based threshold logic gates

  8. Positive-Negative Weight Transformation • The relationship of the weights and threshold value between functions containing xi in positive and negative phase is given in [1]. • Step 1. Invert the negative weights into positive ones and complement the corresponding variables. • Step 2. Increase the threshold value by adding the absolute value of the negative weight. x1 x2 x3 2 1 -1 1 f x1 x2 y3 2 1 1 2 f y3 = x3’ [1] S. Muroga. Threshold Logic and its Applications. New York, NY: John Wiley, 1971.

  9. Applications • Generate threshold network with new fanin number constraint instead of resynthesizing. • Combinational equivalence checking • Rewire on the compared threshold logic networks to keep the appearances of them the same. • The connectivity among all gates. • The functionality of each corresponding gate.

  10. Outline • Rectification • Critical effect • Connection method • Simplification • Simplification flow • Weight decreasing • Terminologies • Experiment • Verification • Experimental results • Future work • Introduction • Rewiring • Rewiring flow • Preliminary • Assumption • Preprocess • Grouping • Target wire removal • Useless threshold gate • Useless threshold group • Critical input • Useless input

  11. Rewiring Flow Input: A threshold network and a target wire Grouping and decomposition START Target wire removal The target wire is critical? No Yes Rectify at the transitive fanout cone? Yes No |input| in group = 1 The target wire is critical and |group|=1 Yes No Yes No • Rectification • Keep T • Rectification network is target wire • OR connection • Rectify at all inputs of objective gate • Rectification • Decrease T • Rectification network is target wire • AND connection • Rectify at all inputs in its group • Rectification • Keep T • Construct the rectification network by critical effect • OR connection • Remove the useless input • Rectification • Decrease T • Rectification network is target wire • AND connection Simplification Output: The threshold network END

  12. Rewiring • Given a threshold logic network, and a target wire to be removed. • Preprocess • Grouping • The target wire removal • Rectification construction • Preserve the remaining functionality. • Change the threshold value if it is necessary. • Rectify at different locations. • Search for the rectification network. • Different connection.

  13. Grouping • A threshold logic gate can be divided into many groups. • Observe the threshold logic gate in groups, decrease the complexityin following operations. • Objective: Separate the inputs and the corresponding weights into different groups • Step 1. Separate an input whose weight is equal to the threshold value of the objective gate as a single group. • Step 2. The remaining inputs are separated as another group. a b c d e f 3 2 1 1 5 5 5 f

  14. Gate Decomposition and Merging (1/2) • Each group can be extracted as a new threshold logic gate. • The threshold value of decomposition gate is the same as that of the objective gate. • The weights of the objective gate associated with the decomposition gate is the threshold value. The decomposition gate a b c a b c d 3 1 1 1 1 1 1 3 3 f 3 d 3 3 f

  15. Gate Decomposition and Merging (2/2) • The decomposition gate can be merged as a new group of its fanout gate if it satisfies the following conditions. • All inputs of the decomposition gateare disjoint with all inputs of its fanout gate. • The output wire of the decomposition gate is the only one input in its group of the fanout gate. • The threshold value of the decomposition gate and its fanout gate must be the same.

  16. Target Wire Removal • Remove the target wire and its corresponding weight from the objective gate directly. • The objective gate after removing the target wire. • Become a useless threshold logic gate. • Still isa normal threshold logic gate. • It’s necessary to ensure the objective gate out of uselessness after any operation in our rewiring procedure.

  17. Useless Threshold Logic Gate • Def: A threshold logic gate is useless if and only if it is empty or it outputs zero for all input combinations. • Lemma: Given an nonempty threshold gate, it is useless if and only if it satisfies the following equation where n is the number of input in this gate. The threshold logic gate is useless because it outputs zero for all input combinations. a b c 1 1 1 4 f

  18. Useless Threshold Logic Group • Def: A threshold logic group is useless if and only if it is empty or its corresponding decomposition gate outputs zero for all input combinations in this group. • Lemma: Given agroup in a gate, it is useless if and only if it satisfies the following equation where m is the number of the input in this group. Given the the threshold logic gate, the group composed of b and c is useless because the output is zero for all input combinations. a b c 3 1 1 3 f

  19. Critical Input • Def: An input is critical if this group will become useless after removing the input. • Lemma: Given a group in a threshold logic gate, one of its input xj with a weight wjis critical if and only if it satisfies the following equation where m is the number of input in this group. Given the threshold logic gate, inputs a and b are critical because their group will become empty after removing a or b, respectively. The input c is critical because the group will become useless after removing c. a b c d e 3 3 2 1 1 3 f

  20. Useless Threshold Logic Input • Def: An input is useless if and only if the output of this gate is intact when the input toggles under all input combinations. The threshold logic input c is useless because the output is intact when input c toggles for all input combinations. a b c 3 2 1 5 f

  21. Useless Threshold Logic Input • Lemma: Given an input xjwith its corresponding weight wj, xj is useless if and only if it satisfies either (A) or (B) for each input combination, where n is the number of input in the gate. (A) and (B) and

  22. Features • Useless gate, useless group and useless input are not allowed in the threshold network. • The removing procedure may generate them. • The critical input is a necessary input for keeping the group or the gate useful. • It will have strong relationshipwith all inputs in the same group.

  23. Rectification • It varies with the properties of the target wire and the rectification location. • Preserve the remaining functionality • Keep the objective gate after the removal out of uselessness. • The search for rectification network • The connection method

  24. Rectification Location • Rectification location will affect the strategy for rectification. • Transitive fanout cone of the objective gate. • Transitive fanin cone of the objective gate.

  25. Connection (1/2) • Different connections • OR connection • Rectify as a new input in a new group of the threshold logic gate. • The threshold value of the gate will be reused for the weight of the wire. • AND connection • Rectify as a critical input in the gate. • The weight of the wire is (largest input weight of the gate * #largest input) + 1. • The threshold logic value of the gate will increase by the same value.

  26. Connection (2/2) • Connection with an additional gate • OR connection • AND connection The remaining threshold network after removing The rectification network 1 1 1 f The remaining threshold networkafter removing The rectification network 1 1 2 f

  27. Rectification Construction • Case 1: If the target wire is not critical, because the removal will cause a functional collapsing, we rectify at its transitive fanout location. • Keep the threshold value. • Search for the rectification network with critical effect. • Rectify with OR connection.

  28. Critical Effect • Def: A single group threshold logic gate has a critical effect if and only if there exists an assignment such that the output changes from 1 to 0 when one of its input changes from 1 to 0. • Lemma: Given a threshold gate, it has a critical effect if and only if it satisfies the following equation. Given the threshold logic gate, the critical effect vectors are (a,b,c,d) = (1,1,0,0) and (1,0,1,1) a b c d 5 f 3 2 1 1

  29. Critical Effect f 3 • A vector where a gate has a critical effect is called a critical effect vector. • The value of the target wire in the critical effect vector determine whether or not a subfunction is lost after removing the target wire. a b c 2 1 1 for the target wire b

  30. Search for the Rectification Network (1/2) • Step 1: Given the target wire xa. Get the input union if it satisfies the condition. • keep the input assumed 1 in a critical effect vector where xa assumed 1. a b c d e 5 2 1 1 1 7 f The objective gate and the target wire d. Input a,dand e are found in the critical effect vector 10011. Input a,cand d are found in the critical effect vector 10110. The input union: a, c, d and e

  31. Search for the Rectification Network (2/2) • Step 2: Get the rectification network by creating a new gate consisting of the input union found in step 1 and threshold value of the objective gate. a b c e a c d e 5 2 1 1 5 1 1 1 7 7 f1 f2 The objective gate after the target wire d removal. The rectification network

  32. Rectification Construction • If there exists a useless input in the remaining objective gate, remove the useless input simultaneously. Besides, the rectification network contains it definitely. • Rectify using the OR connection. n1 n2 a c d e a b c e 1 1 5 2 1 1 5 1 1 1 1 7 7 f

  33. Rectification Construction 10 y • Case 2: The target wire is critical, and its objective gate contains one group only. We rectify at the transitive fanout cone. • It will cause a useless gate after the removal. • Decrease the threshold value of the objective gate by the weight of the target wire. • The rectification network is the target wire only. • Rectify with AND connection. y b c d e a b c d e 6 4 3 1 1 4 3 1 1 a n1 1 1 2 4 The target wire a and the objective gate

  34. Rectification Construction • If the objective contains many groups, the removal will not cause a useless gate. The rectification construction is the same as case 1. • The rectification network contains the whole group inputs.

  35. Rectification Construction • Case 3: The target wire is critical, and we rectify at the transitive fanin cone. Besides, the target wire is the only one input in its group. • Keep the threshold value. • The rectification network is the target wire itself. • Rectify using the OR connection • All inputs in its objective gate.

  36. a n1 n2 g Rectification Construction n3 n1 n2 2 1 1 3 3 y b c g 1 1 2 3 2 • The given threshold network and the target wire g 2 1 1 y d e f 3 2 1 1 d e f g 3 2 1 1 3 b c a g 1 1 1 2 1 1

  37. Rectification Construction • Case 4: The target wire is critical, and we rectify at the transitive fanin cone. Besides, the target wire is not the only one input in its group. • Decrease the threshold value of the decomposition gate by the weight of the target wire. • The rectification network is the target wire itself. • Rectify using the AND connection • All inputs in its group.

  38. a b c a n1 n2 g Rectification Construction 2 1 1 3 3 y y n1 n2 g a d e f • The given threshold network and the target wire a 6 3 2 1 1 1 1 1 1 d e f 3 2 1 1 b c 3 1 1 1 1 2 5

  39. Features • Rewire any target wire in the threshold network without variation of functionality. • It only depends on the information of input and weight and the threshold value of each gate without the Boolean representations.

  40. Outline • Rectification • Critical effect • Connection method • Simplification • Simplification flow • Weight decreasing • Terminologies • Experiment • Verification • Experimental results • Future work • Introduction • Rewiring • Rewiring flow • Preliminary • Assumption • Preprocess • Grouping • Target wire removal • Useless threshold gate • Useless threshold group • Critical input • Useless input

  41. Simplification • After the synthesis, the ILP solver will give a canonical solution for the weight and threshold value of each threshold logic gate. • In our rewiring procedure, some threshold gates will not be represented canonically. • Keep each threshold logic gate simplified after each removal and rectification procedure. • Minimum positive weight

  42. Simplification Flow Input The LTG out of canonicity START • Step3: Decrease the input weight by sequence, and decrease T by the weight • Get an updated LTG • Get the results of the assignments found in the original LTG which has a critical effect and its brothervector. Step 1: Divide the common divisor Step 2: Get the assignment for the LTG which has a critical effect and its brothervector. Step 4: Check the consistency between the original LTG and the updated LTG. Step 4-b No Step 4-a Yes Update the LTG Step 5: There exists an input to decrease? Yes No Output The canonical LTG END

  43. Terminologies • Subvector of the vector has a less number of input assumed 1, and its set of input assumed 1 is a subset of the vector. • Supervector of the vector has a greater number of input assumed 1, and its set of input assumed 1 is a superset of the vector. • Brothervector of the vector has the same number of input assumed 1, and its set of input assumed 1, and it has a disjoint set of input assumed 1. A vector (a, b, c) = (0, 1, 1) Subvectors: (0, 0, 1) and (0, 1, 0) Supervector: (1, 1, 1) Brothervectors: (1, 0, 1) and (1, 1, 0)

  44. Terminologies a b c d 6 4 2 1 1 f • Use fewer assignments to check the consistency.

  45. Simplification • Step 1: Ensure that the weights for all inputs and threshold value have no common divisor which is larger than 1. • It is necessary to divide common divisor. • Step 2: Keep the critical effect vectors and their brothervector. • Record the outputs of the gate under this input assignment set.

  46. Simplification • Step 3: Decrease each input weight by 1 with sequence and decrease the threshold value by 1 as well. Get a updated threshold logic gate after decreasing the input weight. • Record the outputs of the updated gate under the input assignment set found previously.

  47. Simplification • Step 4: Check the consistency between the updated gate and the original gate. • Step 4-a: If an inconsistency occurs, the decreasing operation is unaccepted. • Keep the original threshold logic gate. • The input cannot be decreased any more. • Step 4-b: If all outputs are the same, the decreasing operation is accepted. • Renew the information of original threshold logic gate with the updated one. • Ensure that the weights for all inputs and threshold value have common divisor 1.

  48. Simplification • Step 5: End the simplification procedure if any input weight decreasing can not be accepted. Or return to step 3. • All inputs have to be determined whether or not they have spaces to decrease after a weight compression is accepted.

  49. Simplification • The inputs have symmetric functional relationship if they are in the same weighted. • These input weights have to be decreased concurrently. a b c d a b c d a b c d 5 4 1 2 5 4 2 1 5 4 2 2 f f f 10 10 11 Input c and d have the same correlation functionality in the LTG. Unaccepted! Unaccepted!

  50. Simplification • For the same weight input decreasing, the threshold value is decreased by a fixed number of these inputs assumed 1 in each critical effect vector. a b c d a b c d a b c a b c 3 1 1 1 1 1 1 2 2 1 3 2 2 2 f f f f 5 7 3 5 The number of the input a and b assumed 1 is 2. The original LTG The LTG after the weight decreasing The original LTG The number of the input b, c and d assumed 1 is 2. The LTG after the weight decreasing

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