1 / 19

cmos analog addition

Addition. Why adder?Neural networkContinuous time signal processing applicationLow power / small size. Addition / Subtraction Using Op-Amp. R1. R2. Rf. V1. V2. = -Rf ( V1/R1 V2/R2). V1. V2. R1. R2. R1. R2. = R2/R1 ( V1 - V2 ). R1. R2. V1. V2. = R2/R1 ( V3

Pat_Xavi
Télécharger la présentation

cmos analog addition

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

    1. CMOS Analog Addition/Subtraction Jaehyun Lim Department of Computer Science and Engineering The Pennsylvania State University

    3. Addition / Subtraction Using Op-Amp

    4. Addition / Subtraction Using Op-Amp

    5. Other OP-Amp Applications differentiator / integrator active filters I / V converter positive / negative voltage reference voltage supply wave form generator oscillator and moreand moreand more

    6. Addition Design #1

    7. Addition Design #1

    8. Addition Design #2

    9. Addition Design #2

    10. Addition Design #3

    11. Subtraction Design #1 (from adder Design #2)

    12. Subtraction Design #1

    13. Reference [1] M. Al-Nsour, et al., Analog Computational Circuits for Neural Network Implementation, Proceedings of ICECS '99. The 6th IEEE International Conference on Volume 1, 5-8 Sept. 1999 pp. 299 - 302 vol.1 [2] S. W. Tsay and R. W. Newcomb, A Neural-Type Pool Arithmetic Unit, Circuits and Systems, 1991., IEEE International Sympoisum on 11-14 June 1991 pp. 2518 - 2521 vol.5 [3] A. Diaz-Sanchez, et al., A Compact High Frequency VLSI Differential Analog Adder, Circuits and Systems, 1996., IEEE 39th Midwest symposium on Volume 1, 18-21 Aug. 1996 pp. 21 - 24 vol.1 [4] H. Chaoui, CMOS Analogue Adder, Electronics Letters Volume 31, Issue 3, 2 Feb. 1995 pp. 180 181 [5] C. Chang, et al., Low-Voltage Analog Tripler Circuit, Journal of Analog Integrated Circuits and Signal Processing, vol. 26, pp. 125-128, Feb. 2001. [6] R. Fried and C. Enz, A Family of Very Low-Power Analog Building Blocks Based on CMOS Translinear Loops, Analog and Mixed IC Design, 1997. Proceedings., 1997 2nd IEEE-CAS Region 8 Workshop on 12-13 Sept. 1997 pp. 73 78 [7] An Applications Guide for Op Amps, National Semiconductor Application Note 20, Feb. 1969 [8] G. Clayton and Steve Winder, Operational Amplifiers, Newnes, 2003

    14. Simulation

    15. Simulation

    16. Simulation

    17. Simulation

    18. Simulation

    19. Simulation

More Related