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Pspice Simulations

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  1. Pspice Simulations Intro. To Capture/PSpice Simulation of EST Simulation of Existing Test Beam

  2. Capture and PSpice • can create schematics for analog or mixed signal designs, PCB layout • PSpice can simulate analog designs • PSpice libraries contain over 11,000 parts • can download PSpice models directly from manufacturer’s web sites

  3. PSpice Simulation Output • PSpice can perform DC, AC, transient analyses • You can place “probes” at any part of the circuit • Output can be written to ASCII file for further analysis

  4. Electrostatic Transformer (EST) Fig 8-4, from ATLAS Tech. Design Report (1996)

  5. EST- Schematic

  6. Fig 19 from NIM paper – May 2001

  7. NOMINAL: 4 identical current pulses I(t) = Io(1-t/td) Io = 100 nA td = 400 ns NON-NOMINAL: Due to potential difference, gaps between plates of capacitors change 1 pulse is longer than the other 3 EST Ideas:

  8. EST – Output Signal

  9. HEC Electronics Chain Figure 1 from Kurchaninov, ATLAS-HEC Note 109 (2001)

  10. HEC Electronics Chain • PSpice model based upon schematic and electronic parameters presented in HEC Note 109 • rough circuit design complete • Need more info. about Kapton cable spec’s • May replace Laplace equations with equivalent circuitry

  11. HEC Electronics Chain • calibration pulse measured on Strip Line (SL) Left: fig 5 from HEC Note 109 Right: PSpice output

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