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High Speed, high common mode immunity communication interface

High Speed, high common mode immunity communication interface. Team May12-05 Chendong Yang Mengfei Xu Advisor: Nathan Neihart Client : RBC Medical Development. Statement of Purpose .

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High Speed, high common mode immunity communication interface

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  1. High Speed, high common mode immunity communication interface Team May12-05 ChendongYang MengfeiXu Advisor: Nathan Neihart Client: RBC Medical Development

  2. Statement of Purpose • Design a high speed low voltage differential signaling communication interface that would be capable of a high common mode immunity and high speed transmission. Why is LVDS used? • LVDS signals have the characteristics of low-noise and fast data rate

  3. Why is high common mode voltage immunity needed? • When the reference voltage changes from transmitter and receiver, it can cause errors in output signal. It is even important when transmitting patient critical signals which need to be uninterrupted. Vgound2=0v Vgound1=10v Normal system Our System

  4. Functional Requirements • 1. System is capable at least 20M bps • 2. At least 10 Volts Common mode voltage immunity • 3. TTL/CMOS input level signals in and same signals out only with some amplitude modification. • 4. The clock and associated circuitry will be electrically isolated from the rest of the system

  5. Non-Functional Requirements • 1. Stability, The output of the system should be stable. • 2. Budget restriction Less than $3000. • 3. Easy to use The whole system should be easily setup and tested.

  6. Conceptual Sketch/ Block Diagram V_pp = 300mV f = 10 MHz Same Data Out Serial Signal Comparator Transmitter USB Cable CLK CLK

  7. Plan Search in the current electronic market to see if we can find existing transmitter and receiver system that meet the requirement. Market Search Market Search Result There are no such communication system existing in the market. We need to build up our own boards with proper driver and comparator chips in the market, then test the results

  8. Schedule Semester I

  9. Schedule semester II

  10. Our choice • Transmitter: DS90C031 from National Semiconductor • Rising/Falling time: 1.5 ns • input switching frequency support: excess 77 MHZ • ~$3 • ±350 mV differential signal • Receiver: LT 1711 from Linear Technology • High common mode rejection : 65-75dB • Rising/Falling time: 2ns • Power supply range : 14 V • Maximum input toggle frequency : 100 MHZ • ~$5

  11. Transmitter PCB Design • Software: CadSoft EAGLE PCB design software schematic layout

  12. Actual Transmitter PCB SMA connector USB Cable

  13. Transmitter Test • Test environment 1. Input signal:1-10 MHZ 3 Volts Vpp square wave with 1.5 Volts Vos 2. Power supply : 5v 3. Equipment used : function generator, oscilloscope, power supply and different kinds of cables 4 load:100 ohm Schematic V+ V- gnd

  14. Limitation on Transmitter test • The equipment in the lab which we can access can only provide 10 MHz square wave for testing. The test frequency is much less the maximum capacity of the Transmitter which could go above 77 MHz. • The soldering skill we have not meet the industry equipment, the system could increase the mechanical stability with professional soldering. • No Pspice model are provided by the company, we can not do the Pspice Test for Transmitter

  15. Results(LVDS output for transmitter) V+ V- Output: two differential square wave with 320mv Vpp, and 1.24v Vos. the receiver could decode this signal

  16. Receiver Pspice Simulation Differential square wave, Vp-p = 300mV, frequency = 10 MHz Vdd = 11 V, Vss = 0V, and Vlatch = 0V.

  17. Result I • Input: Differential Square wave, 300mVp-p, 10M Hz • Common mode Voltage = 10 Vdc • Top: Vout • Bottom: Vin+(Green) Vin-(Pink)

  18. Result II • Top: Vout • Bottom: Vin+(Red) Vin-(Black) • Input: Differential Square wave, 300mVp-p, 10M Hz • Common mode voltage changes linearly (PWL) from 0V to 10V

  19. Result III • Top: Vout • Bottom: Vin+(Blue) Vin-(Pink) • Input: Differential Square wave, 300mVp-p, 10M Hz • Common mode voltage changes sinusoidally from 0V and 10 V with 10M Hz.

  20. Receiver PCB Design • Software: CadSoft EAGLE PCB design software

  21. Actual Receiver PCB

  22. Test I: Yellow: V+ input Blue: V- input Pink: output Green: ~output Vin +(Ramp signal): Vp-p = 600mV, common = 6 V and frequency = 10kHz; Vin -: DC = 6V;

  23. Result II Yellow: V+ input Blue: V- input Pink: output Green: ~output Vin +: DC = 6V; Vin -(Ramp signal): Vp-p = 600mV, common = 6V and frequency = 10kHz;

  24. Result III Yellow: V+ input Blue: V- input Pink: output Green: ~output Vin + (Square signal): Vp-p = 600mV, Common = 6V and frequency = 10 kHz; Vin - (Square signal): inverted Vin +.

  25. Limitation on receiver test: • Due to the limitations of equipment in the lab, we cannot change the common mode voltage of the differential signals linearly or sinusoidly as we simulated in Pspice. • We manually change the common mode voltage from 1 V up to 10 V, and there is not significant distortion on output shape or frequency. We can still distinguish the outputs correctly.

  26. Whole System Test Yellow: Input Blue: Output Input: Square wave, Vp-p = 3V, Frequency =1MHz;

  27. Yellow: Input Blue: Output Input: Square wave, Vp-p = 3V, Frequency =10 MHz;

  28. Limitation on Whole System test: • We cannot swing or change the common mode voltage transmitting through USB cable manually. • But we did common mode voltage test in the receiver test separately, it is sufficient to show that our designed system has the ability to transmitter 10 MHz and tolerate common mode voltage up to 10 V change.

  29. Total Cost

  30. Questions?

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