1 / 77

Biomedical Signal processing Chapter 6 structures for discrete-time system

Biomedical Signal processing Chapter 6 structures for discrete-time system. Zhongguo Liu Biomedical Engineering School of Control Science and Engineering, Shandong University. 山东省精品课程 《 生物医学信号处理 ( 双语 )》 http://course.sdu.edu.cn/bdsp.html. 1. § 6 structures for discrete-time system.

annaholt
Télécharger la présentation

Biomedical Signal processing Chapter 6 structures for discrete-time system

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. Biomedical Signal processingChapter 6 structures for discrete-time system Zhongguo Liu Biomedical Engineering School of Control Science and Engineering, Shandong University 山东省精品课程《生物医学信号处理(双语)》 http://course.sdu.edu.cn/bdsp.html 1 Zhongguo Liu_Biomedical Engineering_Shandong Univ.

  2. §6 structures for discrete-time system 6.0 Introduction 6.1 Block Diagram Representation of Linear Constant-Coefficient Difference Equations 6.2Signal Flow Graph Representation of Linear Constant-Coefficient Difference Equations 6.3 Basic Structures for IIR Systems 6.4 Transposed(转置) Forms 6.5 Basic Network Structures for FIR Systems

  3. Structures for Discrete-Time Systems 6.0 Introduction

  4. 6.0 Introduction Characterization of an LTI System: • Impulse Response • z-Transform: system function • Difference Equation →Frequency response • converted to a algorithm or structure that can be realized in the desired technology, when implemented with hardware. • Structure consists of an interconnection of basic operations of addition, multiplication by a constant and delay

  5. Illustration for the IIR case by convolution Example: find the output of the system with input x[n]. Solution1: IIR Impulse Response even if we only wanted to compute the output over a finite interval, it would not be efficient to do so by discrete convolution, since the amount of computation required to compute y[n] would grow with n .

  6. Example: find the output of the system with input x[n]. Solution2: LTI recursive computation of output initial-rest conditions(for n<0, if x[n]=0, then y[n]=0) The algorithm suggested by the equation is not the only computational algorithm, there are unlimited variety of computational structures (shown later).

  7. Why Implement system Using Different Structures? • Equivalent structures with regard to their input-output characteristics for infinite-precision representation, may have vastly different behavior when numerical precision is limited. • Effects of finite-precision of coefficients and truncation or rounding of intermediate computations are considered in latter sections. • Computational structures(Modeling methods): • Block Diagram • Signal Flow Graph

  8. Structures for Discrete-Time Systems 6.1 Block Diagram Representation of Linear Constant-Coefficient Difference Equations

  9. x2[n] x1[n] x1[n] + x2[n] + b0 ax[n] x[n] x[n-1] z1 x[n] 6.1 Block Diagram Representation of Linear Constant-Coefficient Difference Equations Implementation of an LTI system by iteratively evaluating a recur­rence formula needs three basic elements: system function Unit Delay (Memory, storage) z-M x[n-M] M sample Delay Multiplier Adder

  10. b0 + a1 + a2 Ex. 6.1 draw Block Diagram Representation of a Second-order Difference Equation 1 Solution: x[n] y[n] z1 y[n-1] z1 y[n-2]

  11. Nth-Order Difference Equations Form changed to a’[0] normalized to unity

  12. x[n] y[n] b0 + + z1 z1 b1 a1 x[n-1] y[n-1] + + z1 z1 x[n-2] y[n-2] bM1 aN1 + + z1 z1 bM aN x[n-M] y[n-N] Block Diagram Representation(Direct Form I) v[n]

  13. b0 y[n] x[n] + + z1 z1 b1 a1 x[n-1] y[n-1] + + z1 z1 x[n-2] y[n-2] bM1 aN1 + + z1 z1 bM aN x[n-M] y[n-N] Block Diagram Representation(Direct Form I) Implementing zeros Implementing poles v[n]

  14. b0 y[n] x[n] + + z1 z1 b1 a1 x[n-1] y[n-1] + + z1 z1 x[n-2] y[n-2] bM1 aN1 + + z1 z1 bM aN x[n-M] y[n-N] Block Diagram Representation(Direct Form I) Implementing zeros Implementing poles v[n]

  15. y[n] x[n] b0 + + z1 z1 b1 a1 x[n-1] y[n-1] + + z1 z1 x[n-2] y[n-2] bM1 aN1 + + z1 z1 bM aN x[n-M] y[n-N] Block Diagram Representation(Direct Form I) How many Adders? How many multipliers? How many delays? N +M N +M+1 N+M v[n]

  16. x[n] y[n] b0 + + z1 z1 b1 a1 x[n-1] y[n-1] + + z1 z1 x[n-2] y[n-2] bM1 aN1 + + z1 z1 bM aN x[n-M] y[n-N] Block Diagram Representation(Direct Form I) v[n]

  17. x[n] y[n] b0 + + z1 z1 a1 b1 w[n-1] + + z1 z1 w[n-2] aN1 bN1 + + z1 z1 aN bN w[n-N] Block Diagram Representation (Direct Form II) 规范直接型 (or called Canonic direct Form) w[n] Assume M = N

  18. w[n] b0 x[n] y[n] + + z1 z1 a1 b1 w[n-1] + + z1 z1 w[n-2] Assume M = N aN1 bN1 + + z1 z1 aN bN w[n-N] Block Diagram Representation (Direct Form II) Implementing poles Implementing zeros

  19. w[n] b0 x[n] y[n] + + z1 z1 a1 b1 w[n-1] + + z1 z1 w[n-2] Assume M = N aN1 bN1 + + z1 z1 aN bN w[n-N] Block Diagram Representation (Direct Form II) Implementing poles Implementing zeros

  20. x[n] w[n] y[n] b0 + + z1 z1 a1 b1 w[n-1] + + z1 z1 w[n-2] Assume M = N aN1 bN1 + + z1 z1 aN bN w[n-N] Block Diagram Representation (Direct Form II) N +M How many Adders? How many multipliers? How many delays? N +M+1 N+M

  21. x[n] y[n] b0 + + z1 b1 a1 + + z1 aN1 bN1 + + z1 aN bN Block Diagram Representation (Canonic Direct Form or direct Form II) How many Adders? How many multipliers? How many delays? max(M, N) N +M N +M+1 N w[n] w[n-1] 规范直接型 w[n-2] Assume M = N w[n-N]

  22. x[n] y[n] b0 + + z1 b1 a1 + + z1 aN1 bN1 + + z1 aN bN Block Diagram Representation (Canonic Direct Form or direct Form II) w[n] w[n-1] 规范直接型 w[n-2] Assume M = N w[n-N]

  23. Ex. 6.2 draw Direct Form I(II) implementation of an LTI system Solution: 1 x[n] y[n] + + v[n] z1 z1 2 1.5 y[n-1] x[n-1] + z1  0.9 y[n-2] Direct Form I

  24. Ex. 6.2 draw Direct Form I(II)implementation of an LTI system v[n] 1 1 x[n] y[n] + + + + w[n] y[n] Solution: z1 z1 z1 z1 2 2 1.5 1.5 y[n-1] y[n-1] x[n-1] + + w[n-1] Direct Form I z1 z1 Direct Form II  0.9  0.9 y[n-2] y[n-2] x[n]

  25. w[n] 1 y[n] + + x[n] z1 2 1.5 + w[n-1] z1  0.9 w[n-2] Ex. 6.2 draw Direct Form I(II)implementation of an LTI system 1 + + w[n] y[n] Solution: z1 z1 2 1.5 y[n-1] + w[n-1] z1 Direct Form II  0.9 y[n-2] x[n]

  26. Structures for Discrete-Time Systems 6.2 Signal Flow Graph(信号流图) Representation of Linear Constant-Coefficient Difference Equations

  27. Node k Node j 6.2 Signal Flow Graph Representation of Linear Constant-Coefficient Difference Equations • A Signal Flow Graph is a network of directed branches(有向支路)that connect at nodes(节点). Associated with each node is a variable or node value, being denoted wj[n]. 梅森(Mason)信号流图 Sequence wj[n] wk[n] Signal Flow Graph (SFG)

  28. Nodes And Branches We will only consider linearSignal Flow Graph Output:A linear transformation of input, such as constant gain and unit delay. Input wj[n] if omitted, it indicates unity unit delay a or z-1 Brach (j, k) Sequences wj[n] wk[n] Node j Node k Each branch has an input signal and an output signal. An internal node serves as a summer, i.e., its value is the sum of outputs of all branches entering the node.

  29. Sink node k Source node j yk[n] wj[n] xj[n] wk[n] Source Nodes (源点 ) • Nodes that have no entering branches inputs outputs Sink Nodes (汇点, 阱点) • Nodes that have only entering branches

  30. d a w2[n] b e w1[n] y[n] x[n] c Example : determine Linear Constant-Coefficient Difference Equations of SFG Sink Node Source Node Solution:

  31. b0 + + z1 b1 a b0 3 b1 2 1 a 4 Block Diagram vs. Signal Flow Graph w[n] y[n] x[n] branching point Canonic direct Form Source Node w1[n] Sink Node w2[n] x[n] y[n] w3[n] Delay branch By convention, variables is represented as sequences rather than as z-transforms z1 w4[n] =w2[n-1] Delay branch cannot be represented in time domain by a branch gain by z-transform, a unit delay branch has a gain of z-l.

  32. b0 + + z1 b1 a b0 1 2 3 z1 a b1 4 Block Diagram vs. Signal Flow Graph Determine the difference equation (System Function) from the Flow Graph. Solution: x[n] w[n] y[n] w1[n] x[n] y[n] w2[n] w3[n] w4[n]

  33. Block Diagram vs. Signal Flow Graph Determine difference equation difficult in time-domain

  34. Ex. 6.3 Determine the System Function from Flow Graph causal system Solution:

  35. Ex. 6.3 Determine the System Function from Flow Graph for causal system :

  36. a -a x[n] y[n] z-1 z-1 Ex. 6.3 compare two implementation requires only one multiplication andone delay (memory) element direct form I implementation twomultiplication andtwo delay

  37. Structures for Discrete-Time Systems 6.3Basic Structure for IIR Systems

  38. 6.3Basic Structure for IIR Systems • for a rational system function, there are manyequivalent difference equationsor network structures. • Reduce the number of constant multipliers • Increase speed • Reduce the number of delays • Reduce the memory requirement • A criteriain the choice among these differentstructures is computational complexity:

  39. Basic Structures for IIR Systems • Direct Forms • Cascade Form • Parallel Form

  40. b0 x[n] y[n] + + z1 z1 b1 a1 x[n-1] y[n-1] + + z1 z1 x[n-2] y[n-2] bM1 aN1 + + z1 z1 bM aN x[n-M] y[n-N] 6.3.1 Direct Forms v[n]

  41. x[n] y[n] v[n] b0 + + z1 z1 a1 b1 y[n-1] x[n-1] + + z1 z1 x[n-2] y[n-2] bM1 aN1 + + z1 z1 bM aN y[n-N] x[n-M] Direct Form I Block Diagram v[n] b0 x[n] y[n] z1 z1 a1 b1 x[n-1] y[n-1] z1 z1 b2 a2 y[n-2] Signal Flow Graph x[n-2] bN-1 aN-1 y[nN+1] x[nM+1] z1 z1 bN aN x[n-M] y[n-N]

  42. Direct Form I Signal Flow Graph Draw SFG Directly v[n] v[n] b0 y[n] x[n] z1 z1 a1 b1 x[n-1] y[n-1] z1 z1 b2 a2 y[n-2] x[n-2] bN-1 aN-1 y[nN+1] x[nM+1] z1 z1 bN aN x[n-M] y[n-N]

  43. Direct Form II

  44. Direct Form II

  45. w[n] y[n] x[n] b0 z1 a1 b1 z1 a2 b2 aN-1 bN-1 z1 aN bN Direct Form II w[n-1] w[n-2] w[n-N-1] w[n-N]

  46. w[n] y[n] x[n] b0 z1 b1 a1 z1 b2 a2 bN-1 aN-1 z1 bN aN Direct Form II Draw SFG Directly

  47. x[n] y[n] z1 z1 z1 z1 y[n] x[n] z1 z1 Ex. 6.4 draw Direct Form I andDirect Form II structures of system Solution: 1 1 0.75 2 Direct Form I 0.125 1 2 0.75 Direct Form II 0.125

  48. 6.3.2 Cascade Form(串联形式) when all the coefficients are real 1st-order factors represent real zeros at gkand real poles at ck , and the 2nd-order factors represent complex conjugate pairs of zeros at hk and h*k and poles at dk ,d*k

  49. 2nd Order System 2nd Order System 2nd Order System Cascade Form A modular structure

  50. b01 b02 b03 z1 z1 z1 a11 b11 a12 b12 a13 b13 z1 z1 z1 a21 b21 a22 b22 a23 b23 Cascade Form For example, assume Ns=3 x[n] y[n] 1 2 3 It is used(see 6.9)when implemented with fixed-point arithmetic, the structure can control the size of signals at various critical points , because they make it possible to distribute the overall gain of the system.

More Related