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INTERCONNECTION NETWORKS

INTERCONNECTION NETWORKS. Dynamic Interconnection Networks - Gomathy. Work done as part of Parallel Architecture Under the guidance of Dr. Edwin Sha By Gomathy Gowri Narayanan Karthik Alagu. Interconnection Networks -Karthik.

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INTERCONNECTION NETWORKS

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  1. INTERCONNECTION NETWORKS Dynamic Interconnection Networks - Gomathy Work done as part of Parallel Architecture Under the guidance of Dr. Edwin Sha By Gomathy Gowri Narayanan Karthik Alagu Interconnection Networks -Karthik

  2. ORGANISATION OF THE PRESENTATION • Study Interconnection Networks • Requirements • Network Design Considerations • Static Interconnection Networks • Dynamic Interconnection Networks • Concentrate more on the DIN and on MIN • Comparisons and Tradeoffs

  3. What are Interconnection Networks? • Connect processors and memory banks • Determines the overall performance • Consists of Processing Elements • Route packets based on application

  4. Interconnection Networks • Processing element to processing element • N processing elements connected by network. • Processing element(PE)  own processor and elements. • Unidirectional network. • Processor to memory • Position network between processors and memories • Bidirectional • Connects each processor to all or some subset of memories • Move data from processor to processor  thro memories

  5. Requirements • Transfer a maximum number of messages in minimum time with minimum cost and maximal reliability. • Small diameter and small average distance • Small and fixed vertex degree • Large bisection width • High connectivity and fault tolerance • Small fault average distance and diameter • Hamiltonianity • Hierarchical recursivity • Incremental extendibility and incremental scalability • Symmetry • Support for routing and collective communication

  6. Design Considerations • Performance requirements • Message latency • network may saturate • throughput • Scalability • Incremental expandability • Distance span • Physical constraints • Reliability • Expected workloads • Control strategy • Switching methodology • Cost constraints

  7. Metrics • Framework to compare and evaluate interconnection networks. • Network connectivity  measures resilience and fault tolerance • Network diameter  maximum inter-node distance • Narrowness  congestion in a network • Network expansion increments  expandability

  8. Classification • Topology  what type of network • Direct/indirect • Switching strategy  how data in a message traverses a route. • Circuit switching/packet switching • Routing algorithm  which path the data follows • Deterministic • Adaptive • Store and forward • Cut-through switching – Worm-hole routing • Flow control mechanism  when a message traverses a route • Ethernet, FDDI/token ring, TCP/WAN

  9. Static interconnection networks • Topology remains same • Connected statically via Point-Point communication links • Used in message-passing architectures

  10. Static interconnection networks • Completely-connected network. • Star-connected network. • Linear array or ring of processors. • Mesh network (in 2- or 3D). • Intel Paragon XP/S, Cray T3D/E • Tree network of processors. • TMC CM5 • Hypercube network. • SGI/Cray Origin 2000

  11. Dynamic interconnection networks • Connected dynamically via switches or buses • Allow reconfiguration during operation • Used in shared address space architectures • Cost: number of switch boxes required

  12. Types • Bus-based networks • PE-M  Common data path • Crossbar switching networks • grid of switching elements • Multistage interconnection networks • In multiprocessor systems • Compromise between cost and performance • Non-blocking • Rearrangeable • Blocking: • Multilevel interconnection network • two or more levels of connections • SGI/Cray Origin 2000

  13. Detailed overview • Bus Architecture • Used over a wide range of cost and performance • Limitations • capacity bottleneck • single point of failure • Limited Fan out capability • Solution: use multiple shared buses. • Sequent symmetry and Alliant(double)

  14. Cross Bar Networks • non-blocking access from any input port to any output port • Low latency • Problems • requires O (N2) • number of pins • Ex C - YMP and Fujitsu VPP 500

  15. Multistage Interconnection Networks • Sets of switches in parallel • Nodes are switches • Types of MIN • Omega • Generalized cube • Clos • Benes • Banyan • Butterfly • Gemini • Honeycomb • Delta • Bi-delta

  16. Omega network • Multistage implementation of single-stage shuffle-exchange network. • 4 operations  • Blocking • routes to different memory banks share a link - message blocked • log p stages • Broadcast data to multiple destinations

  17. Generalized-cube networks • Multistage cube-type network topology • log2Nstages.

  18. Clos network • Rearrangable non-blocking • Implements low latency, high-bandwidth, connection-oriented ATM switching. • Multiple routes between hosts  deadlock-free – hot-spots • No. of middle switches = (2n-1)i

  19. Benes Networks • Special case of Clos networks made of 2 x 2 switches • Recursively constructed from Clos network • Exhibits a symmetric topological structure. • Minimal number of cross points • For N x N switches • N/2 alternative paths • 2 log N-1 stages • cost = N2

  20. Banyan network • Unique path from each input to each output • For k× k switches • logk N stages • N/k logk N switches • Advantages • self-routing • regularity and interconnection patterns • makes very attractive for VLSI implementation • Blocking - buffers

  21. Butterfly networks • Built using crossbar switches • closely related to shuffle-exchange networks • no broadcast connections • Unique path of length log N • Source Oblivious path selection • NYU Ultra computer, IBM RP3, BBN Butterfly, NEC's Cenju

  22. Gemini Networks • Dual technology interconnection network • Used in tightly coupled multicomputer systems. • circuit-switched optical data path in parallel with a packet-switched electrical control/data path. • optical path  transmission of long data messages • electrical path  switch control and transmission of short messages. • O (N log N) switching elements

  23. Honey Comb network • Based on hexagonal plane tessellation • n nodes • degree 3 • Diameter O ( sqrt (n)) • Network cost = degree * diameter • Easy physical layout

  24. Delta Networks • Digit controlled or baseline routing • recursive structure • Path descriptor • Exactly one path from each input node to each output node.

  25. Comparison of DIN • Bus based • Increasing processor, performance deteriorate • Crossbar • Good data performance - expensive • Multistage • Compensate between cost and performance

  26. Tradeoffs

  27. Comparison of MIN

  28. Real machines

  29. Summary • Interconnection Overview • Static Interconnection Networks • Dynamic Interconnection Networks • Multistage Interconnection Networks • Tradeoffs • Comparisons • Comment: choice of IN depends on the application

  30. Questions ??

  31. Our thanks to Dr. Edwin Sha for his support and guidance.

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