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ARM. UNCA ECE 406 April 6, 2007. Acorn Computers. Early builder of microcomputers BBC Micro First ARM-like designed by Sophie Wilson Math undergraduate at Cambridge Based on a 1977 cow feeder Steve Furber implemented as ARM. Apple. Invested in ARM for Apple Newton First PDA
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ARM UNCA ECE 406 April 6, 2007
Acorn Computers • Early builder of microcomputers • BBC Micro • First ARM-like designed by Sophie Wilson • Math undergraduate at Cambridge • Based on a 1977 cow feeder • Steve Furber implemented as ARM
Apple • Invested in ARM for Apple Newton • First PDA • But with handwriting recognition problems • Advanced RISC Machines • Acorn spin-off with Apple support
ARM • IP cores • Intellectual properties • Building blocks of ASIC • Mostly purchased as code • At a high price • Cirrus Logic makes ARM processor chips
Many uses • PDA’s, cell phones • MP3 players, satellite radio • Smart cards • GPS • Calculators • Routers • Disk drive controllers
ARM7DMI • ARM core 7 • JTAG debug • Fast multiply • EmbeddedICE macrocell • For breakpoints • Popular low-power implementation • iPod, Nintendo DS
StrongARM • DEC and ARM build a faster processor • Used in Apple Newton • DEC sold to Intel • Part of settlement of DEC/Intel patent suit over the patent use in Pentium
Intel XScale • Successor to StrongARM • Used in PDA’s • BlackBerry, Dell Axim, Zaurus • Used in some media players • Intel sold XScale to Marvell • Monahans is the latest
Significant versions • ARM – 32 bit • Thumb – 16 bit • Jazelle – Java bytecode • Used in 3G cell phones • DoCoMo (HUGE) • “fully synthesizable”
Programming • Generally in C or C++ • With assembly for higher performance • Public domain compilers exists • But generally ARM users can afford expensive computers • Linux hobbyists may not
ISA – 32 bit version • 16 Registers • R13: Stack pointer • R14: Link register • R15: Program counter • CPSR • N, Z, C, V bits and more • Some registers can be banked • In “fast interrupt”, 7 registers are banked
Instructions • Execute • All versions: add, subtract, and, or, not… • Some versions • Multiply • Saturated add and subtract • CLS (count leading zeros) • Compare instructions • Load/Store • Branch • OS control
Execute example • ADD r7, r5, r3 • r7 = r5 + r3 • ADDS r7, r5, r3 • Also sets condition bits • MOV r7, r5 • r7 = r5 • MOV r7, #100 • r7 = 100
Barrel shifting • MOV r3, r2, LSL #3 • r3 = r2 << 3 • MOV r3, r4, RSL r5 • R3 = r4 >> r5 • Arithmetic shift is allowed • Limited circular shift is allowed
Jumping around • Branch • Branch and link • For subroutine calls • Branch and execute • To execute Thumb subroutines
Example program while (a != b) { if (a>b) a -= b ; else b -= a ; } • Example 3.35 in ARM System Developer’s Guide by Sloss, Symes and Wright
ARM assembly gcd CMP r1, r2 BEQ complete BLT lessthan SUB r1, r1, r2 B gcd lessthan SUB r2, r2, r1 B gcd complete
With conditional execution gcd CMP r1, r2 SUBGT r1, r1, r2 SUBLT r2, r2, r1 BNE gcd
Array load and store I • int r7 • int *r2 • r7 = *(++r2) ; • LDR r7, [r2, #4]! • r7 = *(r2++) • LDR r7, [r2], #4
Array load and store II • int r7 • int *r2 • r7 = *r2 ; • LDR r7, [r2] • r7 = *(r2+1) • LDR r7, [r2, #4]
Array load and store III • int r7 • int r5 • int *r2 • r7 = r2[r5] ; • LDR r7, [r2, r5, LSR 0x2]
Memory support • Caches • Explicit cache control • Protected memory • Paging
