1. Capstone - Fall 2012 Implementation of scheduling in Quick IA: heterogeneous multi-core systems mosse@cs.pitt.edu

2. Multi-core system evolution Big core Big core Big core Big core Big core Big core Small core Small core Small core Small core Small core Small core Small core Small core Traditional homogenous multi-core system Asymmetric/heterogeneous multi-core system

3. Intel QuickIA platform Thread Thread Thread Xeon Xeon . . . Atom Thread Atom Compute-intensive vs memory/IO-intensive threads Single-ISA high-performance "big” vs low-power "small” types of cores Xeon Xeon

4. Challenges • Characterization of thread behavior when running on different core types: is it CPU-bound or memory-bound? Or something else altogether? • Optimized thread allocation on the different core types • Thread allocation/scheduling within each core type Xeon Xeon ? Atom Thread ? Atom Xeon Xeon

5. Characterizing thread behavior • Monitor thread performance, measuring counters • Cache misses • Memory capacity • Number of instructions per cycle • Contention in shared resources (cache/memory) • Real-time, cloud, media applications (Bing?) • Bottleneck identification in multithreaded apps • Threads likely on critical path • Context switches, cache pollution?

6. Scheduling threads to cores • Power and performance trade-off • Big core consumes more power but shorten execution time • Energy = Power x Time • Real-time/performance guarantees • Latency-sensitive apps • Fairness • Avoid big core monopolization • Power/energy reduction • Explicitly account for core power consumption • Thread consolidation in few cores as possible • power off unused cores • energy savings vs. performance degradation (resource contention) • Acceleration of critical path in multithreaded apps • HPC apps