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This proposal outlines the design and development progress of an advanced readout system for Gas Electron Multiplier (GEM) detectors. It includes the integration of an ASIC and ADC for effective beam pad readout and electronic cooling systems. Key components involve the Prisma SED using Gassiplex, ongoing testing of a 32-channel Gassiplex board, and the evaluation of a MAXIM Flash ADC with a Virtex2 FPGA for data conversion and control. Current setups feature parallel FPGA connections and Ethernet communication with a Virtex2Pro development board.
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ACTAR GEMs readout proposal with ASIC & ADC per pad.
GEMs pcb Beam Pad readout Cooling for the electronics Serial communications & Power distribution
Board design in progress • Prisma SED with Gassiplex • Single channel development with PreShape32, FREDA.
GASSIPLEX 32 channel board under test. • MAXIM Flash ADC evaluation board with Virtex2 FPGA for readout conversion, and GASSIPLEX control • Parallel connection between the two FPGAs • Virtex2Pro development board on loan from RAL with link to PC via Ethernet. 1 2 3 4 Current Test setup