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Electronic Engineering Final Year Project By Claire Mc Kenna

Electronic Engineering Final Year Project By Claire Mc Kenna. Title: Point of Load (POL) Power Supply Design Supervisor: Dr Maeve Duffy. Project Outline.

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Electronic Engineering Final Year Project By Claire Mc Kenna

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  1. Electronic Engineering Final Year ProjectBy Claire Mc Kenna Title: Point of Load (POL) Power Supply Design Supervisor: Dr Maeve Duffy

  2. Project Outline • Objective is to compare the industry used Dc-Dc Voltage Regulator Module (VRM) the (Interleaved Buck Converter) with a conventional power converter • Conventional power converter V.I Chips, PRM and VTM made by Vicor Corporation • Pre-Regulator Module (PRM) and Voltage Transformation Module (VTM) chips

  3. Background • Operating voltages for microprocessors are getting smaller e.g. 1V • At present the Intel Xeon (LV) processor operates at 1.1V • Compare the V.I chips and the alternative solution under steady state and transient load conditions

  4. Proposals (Time Scale) • Sept/Oct - Review VRM issues for microprocessor requirements and review V.I chips • Nov – Analyse the Buck converter and identify suitable components • Dec – Magnetic component design for V.I chips and Buck converter

  5. Proposals (Time Scale) • Jan/Feb – Build and test these components for both solutions and test under steady state/transient load conditions • Feb/Mar – Consider the implications of future microprocessor power requirements

  6. Progress • Research on the PRM and VTM V.I chips • 2008 Intel launch new 45nm microarchitecture with energy efficiency technology, so far no information on power requirements or VRM design • Quick review of Buck converter

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