Chapter 2 Data Manipulation

1. Chapter 2Data Manipulation Dr. Farzana Rahman Assistant Professor Department of Computer Science James Madison University Some sldes are adapted from Pearson Education

2. About you • Why are you attending? • What do you understand by Computer Architecture – (In 1 sentence)? Some sldes are adapted from Pearson Education

3. What the chapter is about? • 2.1 Computer Architecture • 2.2 Machine Language • 2.3 Program Execution • 2.4 Arithmetic/Logic Instructions • 2.5 Communicating with Other Devices Some sldes are adapted from Pearson Education

4. Big ideas • How computer manipulates data • What is the basic architecture of computer • How computer is programmed by means of encoded instructions, i.e. machine language Some sldes are adapted from Pearson Education

5. Computer Architecture • Central Processing Unit (CPU) or processor • Bus • Motherboard • RAM • Peripheral devices Some sldes are adapted from Pearson Education

6. Computer Architecture CPU Keyboard Display Bus Hard Disk CD-ROM RAM Some sldes are adapted from Pearson Education

7. The Bus • What is a bus? • It is a simplified way for many devices to communicateto each other. • Looks like a “highway” for information. • Actually, more like a “basket” that they all share. CPU RAM Display Bus Some sldes are adapted from Pearson Education

8. The Bus CPU RAM Display Bus Some sldes are adapted from Pearson Education

9. The Bus • Suppose CPU needs to check to see if the user typed anything. CPU Keyboard Display Bus Some sldes are adapted from Pearson Education

10. The Bus • CPU puts “Keyboard, did the user type anything?” (represented in some way) on the Bus. CPU Keyboard Display Bus “Keyboard, did the user type anything?” Some sldes are adapted from Pearson Education

11. The Bus • Each device (except CPU) is a State Machine that constantly checks to see what’s on the Bus. CPU Keyboard Display Bus “Keyboard, did the user type anything?” Some sldes are adapted from Pearson Education

12. The Bus • Keyboard notices that its name is on the Bus,and reads info. Other devices ignore the info. CPU Keyboard Display Bus “Keyboard, did the user type anything?” Some sldes are adapted from Pearson Education

13. The Bus • Keyboard then writes “CPU: Yes, user typed ‘a’.” to Bus. CPU Keyboard Display Bus “CPU: Yes, user typed ‘a’.” Some sldes are adapted from Pearson Education

14. The Bus • At some point, CPU reads the Bus, and gets the Keyboard’s response. CPU Keyboard Display Bus “CPU: Yes, user typed ‘a’.” Some sldes are adapted from Pearson Education

15. Computer Architecture CPU Keyboard Display Bus Hard Disk CD-ROM RAM Some sldes are adapted from Pearson Education

16. Inside the CPU • The CPU is the brain of the computer. • It is the part that actually executes the instructions. • Let’s take a look inside. Some sldes are adapted from Pearson Education

17. CPU and main memory connected via a bus General purpose register Special purpose register Some slides are adapted from Pearson Education

18. Register 0 Register 2 Register 3 Register 1 Arithmetic/ LogicUnit Instruction Register Program counter Inside the CPU (cont.) Memory Registers Control Unit(State Machine) To hold the currentinstruction To hold the address of the current instruction in RAM Some sldes are adapted from Pearson Education

19. Stored Program Concept • A program can be encoded as bit patterns and stored in main memory. • From there, the CPU can then extract the instructions and execute them. • In turn, the program to be executed can be altered easily. Some sldes are adapted from Pearson Education

20. Terminology • Machine instruction:An instruction (or command) encoded as a bit pattern recognizable by the CPU • Machine language:The set of all instructionsrecognized by a machine Some sldes are adapted from Pearson Education

21. Machine Language Philosophies • Reduced Instruction Set Computing (RISC) • Few, simple, efficient, and fast instructions • Examples: PowerPC from Apple/IBM/Motorola and ARM • Complex Instruction Set Computing (CISC) • Many, convenient, and powerful instructions • Example: Intel Some sldes are adapted from Pearson Education

22. Machine Instruction Types • Data Transfer: copy data from one location to another • Arithmetic/Logic: use existing bit patterns to compute a new bit patterns • Control: direct the execution of the program Some sldes are adapted from Pearson Education

23. Adding values stored in memory Some sldes are adapted from Pearson Education

24. Dividing values stored in memory Some sldes are adapted from Pearson Education

25. The architecture of the machine described in Appendix C Some sldes are adapted from Pearson Education

26. Parts of a Machine Instruction • Op-code:Specifies which operation to execute • Operand: Gives more detailed information about the operation • Interpretation of operand varies depending on op-code Some sldes are adapted from Pearson Education

27. Typical Assembly Instructions • Some common assembly instructions include: • 1) “Load” – Load a value from RAM into one of the registers • 2) “Load Direct” – Put a fixed value in one ofthe registers (as specified) • 3) “Store” - Store the value in a specified register to the RAM • 4) “Add” - Add the contents of two registers and put the result in a third register Some sldes are adapted from Pearson Education

28. Typical Assembly Instructions • Some common instructions include: • 5) “Compare” - If the value in a specified register is larger than the value in a second register, put a “0” in Register r0 • 6) “Jump” - If the value in Register r0 is “0”, change Instruction Pointer to the value in a given register • 7) “Branch” - If the value in a specified register is larger than that in another register, change IP to a specified value Some sldes are adapted from Pearson Education

29. Figure 2.5 The composition of an instruction for the machine in Appendix C Some sldes are adapted from Pearson Education

30. Figure 2.6 Decoding the instruction 35A7 Some sldes are adapted from Pearson Education

32. Program Execution • Controlled by two special-purpose registers • Program counter: address of next instruction • Instruction register: currentinstruction • Machine Cycle • Fetch • Decode • Execute Some sldes are adapted from Pearson Education

33. Figure 2.8 The machine cycle Some sldes are adapted from Pearson Education

34. Figure 2.10 The program from Figure 2.7 stored in main memory ready for execution Some sldes are adapted from Pearson Education

35. Figure 2.11 Performing the fetch step of the machine cycle Some sldes are adapted from Pearson Education

36. Figure 2.11 Performing the fetch step of the machine cycle (cont’d) Some sldes are adapted from Pearson Education

37. A Simple Program • Want to add values of variables a and b (assumed to be in memory), and put the result in variable c in memory, I.e. c  a+b • Instructions in program • Load a into register r1 • Load b into register r3 • r2  r1 + r3 • Store r2 in c Some sldes are adapted from Pearson Education

38. a 2 c 1 3 r1 r2 r3 Memory Logic r4 2005 Load a into r1 IR 2006 Load b into r3 IP 2007 r2 r1 + r3 2008 Store r2 into c CPU Running the Program b 2 Load a into r1 2005 Some sldes are adapted from Pearson Education

39. a 2 c 1 3 r1 r2 r3 Memory Logic r4 2005 Load a into r1 IR 2006 Load b into r3 IP 2007 r2 r1 + r3 2008 Store r2 into c CPU Running the Program b 2 3 Load b into r3 2006 Some sldes are adapted from Pearson Education

40. a 2 c 1 3 r1 r2 r3 Memory Logic r4 2005 Load a into r1 IR 2006 Load b into r3 IP 2007 r2 r1 + r3 2008 Store r2 into c CPU Running the Program b 2 5 3 r2  r1 + r3 2007 Some sldes are adapted from Pearson Education

41. a 2 c 1 3 r1 r2 r3 Memory Logic r4 2005 Load a into r1 IR 2006 Load b into r3 IP 2007 r2 r1 + r3 2008 Store r2 into c CPU Running the Program b 2 5 3 Store r2 into c 2008 Some sldes are adapted from Pearson Education

42. a 2 c 5 3 r1 r2 r3 Memory Logic r4 2005 Load a into r1 IR 2006 Load b into r3 IP 2007 r2 r1 + r3 2008 Store r2 into c CPU Running the Program b 2 5 3 Store r2 into c 2008 Some sldes are adapted from Pearson Education

43. Arithmetic/Logic Operations • Logic: AND, OR, XOR • Masking • Rotate and Shift • Arithmetic: add, subtract, multiply, divide Some sldes are adapted from Pearson Education

44. Rotating the bit pattern 65 (hexadecimal) one bit to the right Some sldes are adapted from Pearson Education

45. Communicating with Other Devices • Controller: An intermediary apparatus that handlescommunication between the computer and a device • Specialized controllers for each type of device • General purpose controllers (USB and FireWire) • Port: The point at which a deviceconnects to a computer • Memory-mapped I/O: CPU communicates with peripheral devices as though they were memory cells Some sldes are adapted from Pearson Education

46. Figure 2.13 Controllers attached to a machine’s bus Some sldes are adapted from Pearson Education

47. Figure 2.14 A conceptual representation of memory-mapped I/O Some sldes are adapted from Pearson Education

48. Communicating with Other Devices (continued) • Direct memory access (DMA): Controller access main memory directly over the bus • Von Neumann Bottleneck:Insufficient bus speed impedes performance • CPU and controller compete the bus • Handshaking: The process of coordinating the transfer of data between components • Computer and device exchange information about the device’s status and coordinate their activities Some sldes are adapted from Pearson Education

49. Communicating with Other Devices (continued) • Parallel Communication:Several communication paths transfer bits simultaneously. • Serial Communication: Bits are transferred one after the other over a single communication path. • USB Some sldes are adapted from Pearson Education

50. Putting it all together • Architecture of computer • Components of CPU • Program counter and instruction register • Machine language using encoded bit patterns • Machine cycle • Op code and operand info • Communication with other peripherals Some sldes are adapted from Pearson Education