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HAPPEX DAQ / ADC Tests PowerPoint Presentation
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HAPPEX DAQ / ADC Tests

HAPPEX DAQ / ADC Tests

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HAPPEX DAQ / ADC Tests

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  1. HAPPEX DAQ / ADC Tests Luis Mercado UMASS 4/17/09

  2. Full DAQ System

  3. Crate currently used in electronics lab for testing. • Plan to move crate into the Hall in early June. • Left Arm Detectors.

  4. Will house Luminosity Monitor connections, Cavity Monitors and Right Arm Detectors. • Proper Lumi-ADC setup was tested Jan’08 to achieve minimum pedestal noise.

  5. Needs to be revived. • Will have different configurations with and without Qweak Crate to facilitate standalone tests. • Should we only use Helicity signals in this crate like during HAPPEX run?

  6. Recently underwent a test with 1 kHz MPS sequence. • DAQ starts to breaks down at 3 kHz. • Concluded we can run at 2 kHz, or 200 Hz with ovs of 10, or 240 Hz with ovs of 8. • Maybe higher but needs to be investigated.

  7. Current Plans • Revive synchronization checks. • Replace many 16-bit ADCs with new 18-bit boards. • Basic DAQ should be ready for testing by mid-July.

  8. Future Tests • High rate deadtime. • Checks of new helicity sequence board. • Synch checks. • Pedestal Studies (helicity-correlated noise).

  9. Latest 18-bit ADC Tests

  10. New 18-bit ADCs • Received four brand new boards a couple of weeks ago. • Performance matches previous tests with prototypes. • Will be receiving 10 more new boards by June 1st.

  11. Testing of 18-bit boards. • Setting and recording proper pedestals offsets. • Studying pedestal noise with respect to gain setting (as low as 12ppm). • Testing linearity of current mode for use with Luminosity Monitors. • Comparing results with previous study done with 16-bit ADCs.

  12. Integration Time (IT) Study • Have had problems in the past with gross nonlinearities at high end of ADC range.

  13. Integration Time (IT) Study • Redid test using new 18-bit ADCs, with some changes: • Sample more IT values by taking smaller steps up the IT ladder. • More data points for higher IT values to get better error bar. • Go up to 230-240K signal to see if it gets worse at the higher end.

  14. Integration Time (IT) Study • Residuals are • less than 0.1% • Local slopes vary by ~0.4%

  15. Integration Time (IT) Study • Residuals are • less than 0.1% • Local slopes vary by ~0.4%

  16. PMT Linearity • Past tests have shown nonlinearities in PMT output dependant on input and gain. • Want to make sure we get similar results with new 18-bit ADCs. • Showed that results matched in good and bad linearity regions.

  17. PMT Linearity (Formalism) • A PMT’s non-linear response can be expressed as follows: • Experimental asymmetry can be approximated:

  18. Experimental Test Setup

  19. PMT Linearity (w. 16bit ADC) Input = 12nA HV = 370 Output = uA B*N_0 = -5.25%

  20. PMT Linearity (w. 18-bit ADC) Input = 12nA HV = 370 Output = uA B*N_0 = -5.14%

  21. Good PMT Linearity Input = 2nA HV = 727 Output = uA B*N_0 = 0.7%

  22. Good PMT Linearity Input = 2nA HV = 727 Output = uA B*N_0 = 0.77%

  23. Ongoing Developments • Revive all HAPPEX DAQ crates and test their performance. • Will need to modify 18-bit ADCs to match replaced 16-bit boards. • Want to document good linearity regions for all available LUMI PMTs.

  24. Acknowledgements • Krishna Kumar • Kent Pashke • Dustin McNulty • Robert Michaels • HAPPEX/PREX Collaboration