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Simulation and Synthesis of RLC and RC Circuits in SPICE and RomWorkbench

This report covers two distinct problems involving the simulation of electrical circuits. Problem 1 examines a three-segment RLC circuit analyzed through SPICE tools, focusing on the current flow through the voltage source and the subsequent synthesis of the circuit using VFIT and DEM methods. Problem 2 involves a ten-segment RC circuit simulated in RomWorkbench, where we compare the original circuit simulation results with those of the synthesized equivalent. Insights from these simulations enhance circuit design processes and verification techniques.

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Simulation and Synthesis of RLC and RC Circuits in SPICE and RomWorkbench

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Presentation Transcript

  1. Problem 1 threeRLC_segs.cir – parametric circuit

  2. The current flowing through the voltage source (simulation of the original circuit)

  3. SPICE synthesis – VFIT+DEM

  4. Simulation of the synthetized circuit

  5. Problem 2 – pb118-100segRC

  6. Simulation of the original circuit in Romworkbench

  7. SPICE synthesis – VFIT+DEM

  8. Comparison between the simulation of the original circuit and the synthetized one in Romworkbench

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