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Instruction Set architecture

Instruction Set architecture

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Instruction Set architecture

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  1. Instruction Set architecture Module : Algorithmic state machines

  2. Machine language • Machine language is built up from discrete statements or instructions. On the processing architecture, a given instruction may specify: • Particular registers for arithmetic, addressing, or control functions • Particular memory locations or offsets • Particular addressing modes used to interpret the operands • More complex operations are built up by combining these simple instructions, which (in Von Neumann Architecture ) are executed sequentially, or as otherwise directed by control flow instructions.

  3. Instruction types • Data handling and Memory operations • set a register (a temporary "scratchpad" location in the CPU itself) to a fixed constant value • move data from a memory location to a register, or vice versa. This is done to obtain the data to perform a computation on it later, or to store the result of a computation. • read and write data from hardware devices

  4. Instruction types • Arithmetic and Logic • add, subtract, multiply, or divide the values of two registers, placing the result in a register • perform bitwise operations, taking the conjunction and disjunction of corresponding bits in a pair of registers, or the negation of each bit in a register • compare two values in registers (for example, to see if one is less, or if they are equal)

  5. Instruction types • Control flow • Branch to another location in the program and execute instructions there • Conditionally branch to another location if a certain condition holds • Indirect branch to another location, but save the location of the next instruction as a point to return to (a call)

  6. Instruction set implementation • When designing the micro architecture of a processor, engineers use blocks of "hard-wired" electronic circuitry (often designed separately) such as adders, multiplexers, counters, registers, ALUs etc. • Some kind of register transfer language is then often used to describe the decoding and sequencing of each instruction of an ISA using this physical micro architecture.

  7. Instruction set • On traditional architectures, an instruction includes an opcode specifying the operation to be performed, such as "add contents of memory to register", and zero or more operand specifiers, which may specify registers, memory locations, or literal data. • The operand specifiers may have addressing modes determining their meaning or may be in fixed fields.

  8. Instruction set example • One instruction may have several fields, which identify the logical operation to be done, and may also include source and destination addresses and constant values. This is the MIPS "Add" instruction which allows selection of source and destination registers and inclusion of a small constant.

  9. MIPS instruction set • Instructions are divided into three types: R, I and J. • Every instruction starts with a 6-bit opcode. • In addition to the opcode, • R-type instructions specify three registers, a shift amount field, and a function field; • I-type instructions specify two registers and a 16-bit immediate value; • J-type instructions follow the opcode with a 26-bit jump target.

  10. MIPS instruction set The following are the three formats used for the core instruction set: