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Instruction Set Architecture

Instruction Set Architecture

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Instruction Set Architecture

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  1. Instruction Set Architecture MIPS Section 2.1-2.5

  2. Operation of the computer Hardware • Every computer must be able to perform arithmetic • add a,b,c # the sum of b and c is placed in a • # of operands = 3 • So will can assume that every instruction will have three operands. • Simplicity favours regularity.

  3. Compiling to MIPS from HL • Compile the following code: • Now try this: • f=(g+h)-(i+j); • What is Java Byte Code a=b+c; d=a-e;

  4. Operands • Operands are not variables, registers • 32 bit registers, 1 word • MIPS has only 32 registers • Smaller is faster • Why the number is 32? Not 31? • $s0,$s1 for variables in Java/C • $t0,$t1 for temporary storage • Try this again:f=(g+h)-(i+j);

  5. Memory Operands • Complex data structures like array and structures • Registers provide only a small amount of storage • Data structures are kept in Memory • So we need data transfer instructions – why? • Instructions of this kind will provide memory address • Less common variables are stored into memory – spilling registers

  6. Memory Organization Viewed as a large, single-dimension array, with an address. A memory address is an index into the array "Byte addressing" means that the index points to a byte of memory. ... 6

  7. Memory Addressing Bytes are nice, but most data items use larger "words" For MIPS, a word is 32 bits or 4 bytes. 2 questions for design of ISA: Since one could read a 32-bit word as four loads of bytes from sequential byte addresses or as one load word from a single byteaddress, How do byte addresses map to word addresses? Can a word be placed on any byte boundary? 7

  8. Addressing Objects: Endianess and Alignment Big Endian: address of most significant byte = word address (xx00 = Big End of word) IBM 360/370, Motorola 68k, MIPS, Sparc, HP PA Little Endian: address of least significant byte = word address (xx00 = Little End of word) Intel 80x86, DEC Vax, DEC Alpha (Windows NT) little endian byte 0 3 2 1 0 lsb msb 0 1 2 3 0 1 2 3 Aligned big endian byte 0 Not Aligned Alignment: require that objects fall on address that is multiple of their size. 8

  9. Immediate Operands • Programs uses constants. • We don’t want to load them from memories every time • Newer version of arithmetic • add immediate • addi $s1,$s2,4 # $s1=$s2+4 • Make the common case faster

  10. Load and Store

  11. Compile practice • g=h+A[8]; • A[12]=h+A[8];

  12. MIPS-32 and MIPS-64 • Do the numbers of registers increase? • Moore’s Law? • Depends on ISA?

  13. Representing Instructions • All instructions are numbers • Numbers are stored as electronic signals • Check Binary and Hexadecimal numbers and their conversions • The registers are numbers • $s0-$s7 16-23 $t0-$t7 8-15

  14. Instructions, like registers and words of data, are also 32 bits long Example: add $t0, $s1, $s2 registers have numbers, $t0=8, $s1=17, $s2=18 Instruction Format:000000 10001 10010 01000 00000 100000op rs rt rd shamt funct Can you guess what the field names stand for? Machine Language 14

  15. Arithmetic Operation Add=32 sub 34

  16. Consider the load-word and store-word instructions, What would the regularity principle have us do? New principle: Good design demands a compromise Introduce a new type of instruction format I-type for data transfer instructions other format was R-type for register Example: lw $t0, 32($s2) 35 18 8 32 op rs rt 16 bit number Where's the compromise? Machine Language 16

  17. Loading Immediate Values What should be the format of addi? addi is in I format What’s the largest immediate value that can be loaded into a register? But, how do we load larger numbers? op rs rt rd shamt funct R I op rs rt 16 bit address 17

  18. I type and R Type

  19. Translation • A[300]=h+A[300] • lw $t0,1200($t1) • add $t0,$s2,$t0 • sw $t0,1200($t1)

  20. Summary - I

  21. So far we’ve learned: MIPS — loading words but addressing bytes — arithmetic on registers only InstructionMeaningadd $s1, $s2, $s3 $s1 = $s2 + $s3sub $s1, $s2, $s3 $s1 = $s2 – $s3lw $s1, 100($s2) $s1 = Memory[$s2+100] sw $s1, 100($s2) Memory[$s2+100] = $s1 21

  22. Use of Registers Example: a = ( b + c) - ( d + e) ; // C statement # $s0 - $s4 : a - e add $t0, $s1, $s2 add $t1, $s3, $s4 sub $s0, $t0, $t1 a = b + A[4]; // add an array element to a var // $s3 has address A lw $t0, 16($s3) add $s1, $s2, $t0 22

  23. load and store Ex: a = b + A[i]; // A is in $s3, a,b, i in // $s1, $s2, $s4 add $t1, $s4, $s4# $t1 = 2 * i add $t1, $t1, $t1# $t1 = 4 * i add $t1, $t1, $s3# $t1 =addr. of A[i] ($s3+(4*i)) lw $t0, 0($t1) # $t0 = A[i] add $s1, $s2, $t0# a = b + A[i] 24

  24. Example: Swap Swapping words $s2 has the base address of the array v temp = v[0] v[0] = v[1]; v[1] = temp; swap: lw $t0, 0($s2) lw $t1, 4($s2) sw $t0, 4($s2) sw $t1, 0($s2) 25

  25. Logical Operations

  26. Summary-II