1 / 26

Advanced Gummel-Poon Model for Intrinsic NPN Transistor Circuit Analysis

This lecture notes series by Professor Ronald L. Carter delves into the Gummel-Poon static model for intrinsic NPN transistors, covering vital equations and characteristics such as base resistance, charge components, and transistor behavior under different bias conditions. Key insights include analyzing forward and reverse Gummel characteristics, depletion and accumulation capacitances, and surface effects. Compiled from foundational texts, these notes aim to enhance the understanding of bipolar junction transistor (BJT) modeling and its applications in electronic circuits.

delano
Télécharger la présentation

Advanced Gummel-Poon Model for Intrinsic NPN Transistor Circuit Analysis

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. EE 5340Semiconductor Device TheoryLecture 23 - Fall 2010 Professor Ronald L. Carter ronc@uta.edu http://www.uta.edu/ronc

  2. Gummel-Poon Staticnpn Circuit Model Intrinsic Transistor C RC IBR B RBB ILC ICC -IEC = {IS/QB}* {exp(vBE/NFVt)-exp(vBC/NRVt)} IBF B’ ILE RE E

  3. IBF = ISexpf(vBE/NFVt)/BF ILE = ISEexpf(vBE/NEVt) IBR = ISexpf(vBC/NRVt)/BR ILC = ISCexpf(vBC/NCVt) QB = (1 + vBC/VAF + vBE/VAR ) {½ + [¼ + (BFIBF/IKF + BRIBR/IKR)]1/2} Gummel Poon npnModel Equations

  4. Charge componentsin the BJT **From Getreau, Modeling the Bipolar Transistor, Tektronix, Inc.

  5. Gummel PoonBase Resistance If IRB = 0, RBB = RBM+(RB-RBM)/QB If IRB > 0 RB = RBM + 3(RB-RBM)(tan(z)-z)/(ztan2(z)) [1+144iB/(p2IRB)]1/2-1 z = (24/p2)(iB/IRB)1/2 From An Accurate Mathematical Model for the Intrinsic Base Resistance of Bipolar Transistors, by Ciubotaru and Carter, Sol.-St.Electr. 41, pp. 655-658, 1997. RBB = Rbmin + Rbmax/(1 + iB/IRB)aRB

  6. iC RC vBC - iB + + RB vBE - vBEx RE BJT CharacterizationForward Gummel vBCx= 0 = vBC + iBRB - iCRC vBEx = vBE +iBRB +(iB+iC)RE iB = IBF + ILE = ISexpf(vBE/NFVt)/BF + ISEexpf(vBE/NEVt) iC = bFIBF/QB = ISexpf(vBE/NFVt)/QB

  7. iC and iB (A) vs. vBE (V) N = 1  1/slope = 59.5 mV/dec N = 2  1/slope = 119 mV/dec Ideal F-G Data

  8. RC vBCx vBC - iB + + RB vBE - RE iE BJT CharacterizationReverse Gummel vBEx= 0 = vBE + iBRB - iERE vBCx = vBC +iBRB +(iB+iE)RC iB = IBR + ILC = ISexpf(vBC/NRVt)/BR + ISCexpf(vBC/NCVt) iE = bRIBR/QB = ISexpf(vBC/NRVt)/QB

  9. iE and iB (A) vs. vBE (V) N = 1  1/slope = 59.5 mV/dec N = 2  1/slope = 119 mV/dec Ideal R-G Data Ie

  10. Ideal 2-terminalMOS capacitor/diode conducting gate, area = LW Vgate -xox SiO2 0 y 0 L silicon substrate tsub Vsub x

  11. Band models (approx. scale) metal silicon dioxide p-type s/c Eo Eo qcox ~ 0.95 eV Eo qcSi= 4.05eV qfm= 4.1 eV for Al Ec qfs,p Eg,ox ~ 8 eV Ec EFm EFi EFp Ev Ev

  12. Flat band condition (approx. scale) Al SiO2 p-Si q(fm-cox)= 3.15 eV q(cox-cSi)=3.1eV Ec,Ox qffp= 3.95eV EFm Ec Eg,ox~8eV EFi EFp Ev Ev

  13. Equivalent circuitfor Flat-Band • Surface effect analogous to the extr Debye length = LD,extr = [eVt/(qNa)]1/2 • Debye cap, C’D,extr = eSi/LD,extr • Oxide cap, C’Ox = eOx/xOx • Net C is the series comb C’Ox C’D,extr

  14. Accumulation forVgate< VFB Vgate< VFB -xox SiO2 EOx,x<0 0 holes p-type Si tsub Vsub = 0 x

  15. Accumulationp-Si, Vgs < VFB Fig 10.4a*

  16. Equivalent circuitfor accumulation • Accum depth analogous to the accum Debye length = LD,acc = [eVt/(qps)]1/2 • Accum cap, C’acc = eSi/LD,acc • Oxide cap, C’Ox = eOx/xOx • Net C is the series comb C’Ox C’acc

  17. Depletion for p-Si, Vgate> VFB Vgate> VFB -xox SiO2 EOx,x> 0 0 Depl Reg Acceptors p-type Si tsub Vsub = 0 x

  18. Depletion forp-Si, Vgate> VFB Fig 10.4b*

  19. Equivalent circuitfor depletion • Depl depth given by the usual formula = xdepl = [2eSi(Vbb)/(qNa)]1/2 • Depl cap, C’depl = eSi/xdepl • Oxide cap, C’Ox = eOx/xOx • Net C is the series comb C’Ox C’depl

  20. Inversion for p-SiVgate>VTh>VFB Vgate> VFB EOx,x> 0 e- e- e- e- e- Acceptors Depl Reg Vsub = 0

  21. Inversion for p-SiVgate>VTh>VFB Fig 10.5*

  22. Approximation concept“Onset of Strong Inv” • OSI = Onset of Strong Inversion occurs when ns = Na = ppo and VG= VTh • Assume ns = 0 for VG< VTh • Assume xdepl = xd,max for VG = VTh and it doesn’t increase for VG > VTh • Cd,min = eSi/xd,max for VG > VTh • Assume ns > 0 for VG > VTh

  23. MOS Bands at OSIp-substr = n-channel Fig 10.9*

  24. Equivalent circuitabove OSI • Depl depth given by the maximum depl = xd,max = [2eSi|2fp|/(qNa)]1/2 • Depl cap, C’d,min = eSi/xd,max • Oxide cap, C’Ox = eOx/xOx • Net C is the series comb C’Ox C’d,min

  25. MOS surface states**p- substr = n-channel

  26. References * Semiconductor Physics & Devices, by Donald A. Neamen, Irwin, Chicago, 1997. **Device Electronics for Integrated Circuits, 2nd ed., by Richard S. Muller and Theodore I. Kamins, John Wiley and Sons, New York, 1986

More Related