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Digital System Design ASMD based Design

Digital System Design ASMD based Design. Agenda of Lecture. ASMD based Design basics Design Example: Traffic Light Controller Design Example: Counter for TLC. ASMD based Design partitioning. Algorithmic State Machine Design ( ASMD) focuses on dividing design into two parts:

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Digital System Design ASMD based Design

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  1. Digital System Design ASMD based Design

  2. Agenda of Lecture • ASMD based Design basics • Design Example: Traffic Light Controller • Design Example: Counter for TLC

  3. ASMD based Design partitioning Algorithmic State Machine Design (ASMD) focuses on dividing design into two parts: • Control Logic (Control Unit) • Components that actually execute the Logic (Data Path)

  4. ASMD Design Partitioning • Draw a Block diagram of the System with all inputs, Outputs and their widths indicated. • Break the main block Diagram into Two Blocks Control Unit and Data path. All inputs are applied to • the control Unit and Outputs are taken from Data Path. • Start thinking on possible components required in data path, make blocks for each element in Data • path. • Put all data components together, and guess about possible signals required from the control Unit.

  5. ASMD: Key Points

  6. ASMD based Partition Complete View

  7. ASMD of Control Unit • State is defined as collection of Signals performing Similar Job. • All States are represented by Boxes with their names. The Transition from one state to other is conditional or unconditional. • In Case of Conditional Transitions, Conditions are given in Triangular boxes.

  8. Writing Code for ASMD of Control Unit

  9. ASMD Example: Traffic Light • Each Signal is Open for 5 Sec and closed for 15 Seconds. • Signals are open from East to North in Clock Wise Direction . • The Signals of Red and Green of Each Signal are in Red, Green Order and 2’b10 is send for Red and 2b01 is send for Green.

  10. Traffic Light design Portioning

  11. Traffic Light Data Path

  12. Traffic Light Data Path

  13. Traffic Light Control Unit

  14. Data Path: Counter

  15. Top Level Diagram

  16. Agenda of Coming Lecture • ASMD based UART Transmitter and Receiver Design

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