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2005 International Technology Roadmap for Semiconductors Radio Frequency and Analog/Mixed-Signal Technologies for Wirel

2005 International Technology Roadmap for Semiconductors Radio Frequency and Analog/Mixed-Signal Technologies for Wireless Communications Working Group April 13, 2005 Munich, Germany. Objectives. Use wireless IC as system / technology driver for ITRS

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2005 International Technology Roadmap for Semiconductors Radio Frequency and Analog/Mixed-Signal Technologies for Wirel

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  1. 2005 International Technology Roadmap for Semiconductors Radio Frequency and Analog/Mixed-Signal Technologies for Wireless Communications Working Group April 13, 2005 Munich, Germany

  2. Objectives • Use wireless IC as system / technology driver for ITRS • Address intersection of Si-based technologies with III-V compound semiconductors and other potential technologies (MEMS, BAW, Passives, ..) • Present technical challenges and requirements for AMS & RF IC technologies in wireless applications for cellular phones, WLAN/WPAN, automotive radar, and phased array RF systems, frequencies 0.8-100GHz • Divide Working Group into 5 sub-groups • CMOS for RF and AMS (0.8-10 GHz) • Bipolar for RF and AMS (0.8-10 GHz) • Power Amplifiers and Power Management (0.8-10GHz) • Passives for RF&AMS and PA (0.8-10GHz) • Millimeter Wave (10-100GHz)

  3. Working Strategy • Methodology: • (1) Communication protocols/standards – governing requirements • (2) Circuits: performance figure of merit – trends/requirements • (3) Devices: performance trend – solutions/challenges • Divided into 2 frequecy bands • (1) 0.8 - 10 GHz (CMOS, Bipolar, Passives, Power Amplifiers) • (2) 10 - 100 GHz (mm-Wave) • Generates roadmap tables in each of the 4 areas: • requirements, difficult challenges, potential solutions • Tables cover technologies • Si CMOS, SiGe HBT, Si LDMOS, GaAs, InP, SiC, GaN • and device structures • MOSFET, MESFET, PHEMT, MHEMT, HBT, LDMOS, on-chip passives • Outcome: RF & AMS IC technology roadmap

  4. 2005 Organization • 34 members ( 22 US, 6 Europe, 6 AP) • compare to 2004; 27 members (14 US, 7 Europe, 6 AP) • 11 new members • Chair: Margaret Huang, Freescale • Co-Chairs: Bin Zhao, Skyworks • Jan-Erik Mueller, Infineon • Editorial: Herbert Bennett, NIST 2004 New Members

  5. 2005 Organization Sub-Group (1): CMOS Peter Cottrell, IBM (L) Ralf Brederlow, Infineon Mark Fedasiuk Intel Digh Hisamoto, Hitachi Margaret Huang, Freescale Takahiro Kamei, Oki Electric Yukihiro Kiyota, Sony Victor Liang, UMC Ernesto Perea, STM Sam Shichijo, TI Bin Zhao, Skyworks 2005 New members

  6. 2005 Organization Sub-Group (2): Bipolar Marco Racanelli, Jazz (L) Stefaan Decoutere, IMEC Erwin Hijzen, Philips Alvin Joseph, IBM Jay John Freescale Bin Zhao, Skyworks Sub-Group (3): Passives Sam Shichijo, TI (L) Doug Coolbaugh, IBM Stefaan Decoutere, IMEC Yoshihiro Hayashi, NEC Dim-Lee Kwong, UT Austin H.C. Tseng, UMC Bin Zhao, Skyworks 2005 New members

  7. 2005 Organization Sub-Group (4): PAs & Power Management Julio Costa, RFMD (L) Chuck Weitzel, Freescale (L) Jim Dunn, IBM Dave Halchin, RFMD Jan-Erik Mueller, Infineon Peter Zampardi, Skyworks, Sub-Group (5): Millimeter Wave (10-100GHz) Tony Immorlica, BAE Systems (L) Herbert Bennett, NIST Ronald Grundbacher, Northrop Grumman Tom Kazior, Raytheon Minh Le, Vitesse David McQuiddy, TriQuint Herbert Zirath, Chalmers University John Zolper, DARPA 2005 New members

  8. 2005 Cross-TWG Focus • Assembly & Packaging • Assy&Pkg led Module roadmap (substrates, embedded passives) • Opportunities to include MEMS, BAW, Switch and Antenna in wireless roadmap. • Plastic package for Base station Pas, mm-wave packaging, Thin packages/modules • System Drivers and Design • Design led Radio SIP design flow • Modeling and Simulation • Accurate, fast and predictive Analog/RF compact models • Computationally efficient physical models for carrier transport for III-V • Test • RF/analog/digital test for SoC system • Reduced RF circuit final test • PIDS • Timing for non-planar (FINFET) LSTP and LOP CMOS implementation • Emerging Research Devices • RF/Analog performance with novel device structures

  9. 2005 Requirement Tables Updates • Bipolar • Derived from 2004 “RF Transceiver” Requirement Table • Separated Bipolar Requirement Table into 3 portions • High Speed – highest speed bipolar devices • RF – most typical bipolar device used for wireless (0.8-10 GHz) • High Voltage – bipolar devices (part of PA tables) • Requirements are for Integrated Wireless Products • Silicon (SiGe) bipolar devices are included • III-V HBTs are not included (part of PA & mm-wave tables) • Major updates from 2004 Requirements • Added Ft/Fmax/BVceo where missing to all device types • Removed power supply requirement (more meaningful for CMOS) • Added current density at peak Ft for high speed device • Overlap with other tables • High Speed Bipolar (mmWave Table) • All shared requirements will be linked • mmWave table will include higher frequency requirements

  10. 2005 Requirement Tables Updates • CMOS - Merging speed analog CMOS & RF CMOS- Merging precision analog CMOS & driver CMOS • Passives - Table will be organized by AMS, RF and PA (III-V and Si/SiGe), then by the component (capacitor, resistor, inductor, varactor). - No major changes expected on the component parameters- Recent progress on high-k multi-layered MIM capacitor will most likely change the color coding. - On-chip inductor Q remains challenging and will require structural changes.

  11. 2005 Requirement Tables Updates • PAs & Power Management - Passives taken out of the 2005 PA table; information incorporated into separate Passive Roadmap section. - Technology table for PA’s to stay essentially unchanged. PA device evolution slow due to nearly fixed battery voltages and ruggedness requirements. - SiGe multiband cellular PA’s being sampled but not yet present in any significant volumes. CMOS PA’s being discussed and sampled but demonstration of viable and rugged PA’s still not published. - ITRS having difficulty recruiting members of CMOS PA companies because of existing lawsuits between the two players in the area. - Highly integrated modules with multi-layer laminates/LTCC dramatically reducing total RF front end area. - We added PA Solutions Table indicating silicon integration enablers for PA integration into system chip, focusing on SOI and high resistance substrates and above-IC RF MEMS technology.

  12. 2005 Requirement Tables Updates • Millimeter Wave (10-100GHz) - Projections will be taken out to near term [~2011] only, as in previous years • compound semiconductors do not enjoy the decades of history from which to extrapolate as does silicon • industry is smaller, less mature, lower investment than silicon - Gate dimensions not shrinking as fast as predicted in 2003-2004 roadmaps • 70 nm gate not in production until 2007 time frame • advances in performance tied more to material and device technologies • e.g. higher performance MHEMTs at same lithographic dimensions as PHEMT - Will start to see some technologies becoming obsolete over this decade • GaAs MESFET – low noise – no new designs past 2006 – foundries likely to produce for legacy products/end of life buys only; same for low voltage power MESFET • PHEMT and InP HEMT may lose ground to MHEMT late in decade - GaN advancing much quicker that predicted in 2003/2004 • some parameters colored “red” for 2007 already achieved but materials quality and device reliability are still issues

  13. Difficult Challenges (1) • Signal isolation • Optimizing analog/RF CMOS devices with scaled technologies: mismatch, 1/f noise, and leakage with high-k gate dielectrics • High density integrated passive element scaling and use of new materials: Q-factor value for inductors; matching and linearity for capacitors • Reduced power supply voltages: degradation in SNR and signal distortion performance for AMS • Reduced device breakdown voltage in scaled technologies • Compound semiconductor substrate quality, especially for SiC • Larger size compound substrates [GaAs, SiC and InP] for lower chip costs and compatibility with silicon processing equipment

  14. Difficult Challenges (2) • Epitaxial layers in compound semiconductors engineering to relieve stress in heteroepitaxy • Non-linear and 3D Electromagnetic models for accurate design and simulation • Difficulty and cost of integrating various analog/RF and digital functions on a chip or in a module • CAD solution for Integrated Radio SIP design (chip, passive, component, package, tool compatibility, model accuracies)

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