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Mixed Signal VLSI

Mixed Signal VLSI. Xunyu Zhu Dr. Chris Hutchens. Outline. Test methods 1. Static test - SIN Histogram i.e. Gain and Offset 2. Dynamic test – i.e. ENOB using 16K FFT SIN fit. Does this make sense??. Test Specification. Static Tests Number of digitized bits Gain Offset

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Mixed Signal VLSI

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  1. Mixed Signal VLSI Xunyu Zhu Dr. Chris Hutchens

  2. Outline Test methods 1. Static test - SIN Histogram i.e. Gain and Offset 2. Dynamic test – i.e. ENOB using 16K FFT SIN fit. Does this make sense??

  3. Test Specification • Static Tests • Number of digitized bits • Gain • Offset • Differential Nonlinearity (DNL) • Integral Nonlinearity (INL) • Monotonicity

  4. Test Specification • Dynamic Tests • Effective number of bits (ENOB) • Signal-to-noise ration (SNR) • Total Harmonic distortion (THD) • Total spurious distortion (TSD) • Spurious-free dynamic range (SFDR)

  5. Static Test • Objective: • Converter accuracy • Transfer function of the converter • Monotonicity of the converter • Quantify the gain, offset, DNL and INL of the converter • Disadvantage: • Nonlinearites which coupled to the input signal bandwidth cannot be revealed • For high bit converters, measurement is lengthy

  6. Test Setup Pattern generator - Period jitter (peak to peak) less than Logic Analyzer - Word length > N Word depth > > 20π*2N Clock Digital Analog Source generator- Resolution N +3 bits Digital Digital Control fB is the input signal frequency N is the ADC resolution Ramp???? test setup • Each voltage step less or equal to 1/8 LSB • At lest 10 samples sampled at each voltage level

  7. Static Test Transfer function described as below Using conventional linear least-squares estimation techniques, get G and Vos as below G is the Gain Vos is the offset T1 is the ideal value corresponding to T[1] T[k] is the input value Q is the ideal width of a code bin ε[k] is the residual error ADC static test result

  8. Static Test Differential nonlinearity Too Many fonts

  9. Static Test Illustration of DNL and INL

  10. Static Test Integral nonlinearity • Where • INL(k) is the integral nonlinearity at output code k, • ε[k] is the difference between ideal output bin T’[k] and T[k] computed from G and Vos, • that is, • Q is the ideal code bin width, expressed in input units, • VFS is the full-scale range of the ADC in input units. • The maximum INL is the maximum value of |INL[k]| for all k. Too many different fonts

  11. Objective- Measure Harmonic and spurious distortion information Input bandwidth Signal-to-noise ratio Effective number of bits (ENOB) Spurious-free dynamic range (SFDR) Dynamic Test Think about the consistency with slide 4

  12. Disadvantage Cannot test for monotonicity of the ADC Input signal must be sampled using an integer number of cycles Histogram test measure the noise of the ADC Test methods Histogram test FFT test Dynamic Test What is the recommended method for measuring the noise of an ADC?

  13. Dynamic Test Pattern generator - Period jitter (peak to peak) less than Logic Analyzer - Word length > N Word depth > 2π*2N ??? Clock Digital Analog Source generator- Resolution N +3 bits Digital fB is the input signal frequency N is the ADC resolution Test setup for histogram and FFT test

  14. Histogram Test • Record length selection There must be an exact integer number of cycles in a record, and the number of cycles in a record must be relatively prime to the number of samples in the record. fi is the input signal frequency fs is the sampling signal frequency J is the number of cycles per record M is a record length

  15. Histogram Test cont’ The procedure to find the near-optimum input signal frequency • Find an integer, r, such that the desired frequency is approximately fs/r. • Let J equal the number of full cycles that can be recorded at the frequency in step a) J=int(M/r) • Let fi equal a) b) etc are NOT consistent with the rest of the ppt slides

  16. Histogram Test cont’ Review SIN reconstruction after this slide Illustration of histogram test results

  17. FFT Test Too Many Fonts • Total harmonic distortion The THD is also often expressed as a dB ratio with respect to rms amplitude of the fundamental component of the output,

  18. FFT Test Too Many Fonts • Total spurious distortion Each of the spurious frequencies in fsp is the frequency of a persistent spectral output component that is neither the fundamental nor a harmonic distortion component.

  19. FFT Test • Spurious-free dynamic range (SFDR) • The ratio of the amplitude of the ADC output averaged spectral component at the input frequency, fi, to the amplitude of the largest harmonic or spurious spectral component observed over the full Nyquist band: • Where • Xavg is the averaged spectrum of the ADC output, • fi is the input signal frequency, • fs and fh are the frequencies of the set of harmonic and spurious spectral components

  20. FFT Test Spectrum of a sine wave and its harmonics

  21. FFT Test Fundamental frequency Harmonics Spurious frequency SFDR Spectrum of a real ADC FFT test result

  22. SINAD is the ration of the signal to the total noise Time domain calculation Signal-to-noise and distortion ratio (SINAD)

  23. Frequency domain calculation Signal-to-noise and distortion ratio (SINAD) cont’ • Effective number of bits (ENOB) Where A is the amplitude of the sine wave fitted to the output V is the full-scale range of the ADC under test Summary Must follow

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