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Linac 4 – LLRF electronics

Linac 4 – LLRF electronics. BCC-35 A.K. Bhattacharyya, A. Butterworth, F. Dubouchet , J. Molendijk, T. Mastoridis , J. Noirjean (reporter), S. Rey, D. Stellfeld , D. Valuch , P.Baudrenghien. Outline. LLRF Cavity controller Servo loops Reference line Clocks Distributor module

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Linac 4 – LLRF electronics

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  1. Linac 4 – LLRF electronics BCC-35 A.K. Bhattacharyya, A. Butterworth, F. Dubouchet, J. Molendijk, T. Mastoridis, J. Noirjean(reporter), S. Rey, D. Stellfeld, D. Valuch, P.Baudrenghien J.Noirjean /12.05.2011

  2. Outline • LLRF Cavitycontroller • Servoloops • Reference line • ClocksDistributor module • Tuner Loop module • CavityLoop module • Switch and Limit module J.Noirjean /12.05.2011

  3. LLRF Cavitycontroller Each Klystron driving one or more cavities has itsownelectronic system (one VME crate) in phase withits RF signal reference J.Noirjean /12.05.2011

  4. Servoloops – Tuner Loop Tuner Loop keeps the structure on resonance J.Noirjean /12.05.2011

  5. Servo loops – Feedforward & Feedback loops RF Feedback and Feedforwardkeep the accelerating voltage at the desired value in the presence of beam transient J.Noirjean /12.05.2011

  6. Servoloops – Klystron drive limiter Klystron Drive Limiter prevents driving the klystron over the saturation limit during loop transients J.Noirjean /12.05.2011

  7. Servoloops – Klystron polar loop Klystron Polar Loop compensates the variation gain across klystron/circulator and phase shift caused by High Voltage (HV) supply fluctuations and droop J.Noirjean /12.05.2011

  8. Reference line • Designer D.Valuch • Some coupler properties • Coupling ~30 dB • Output RF level ~20 dBm J.Noirjean /12.05.2011

  9. ClocksDistributor module • Concept J.Molendijk ,Designer J.Noirjean/J.Lolleriou • Generates harmonically related clocks for the Digital Demodulators • We have different versions for different systems (SPS TWC800MHz, SPS TWC 200MHz, Linac4) • LO Phase noise = 167 fs jitter(= 0.02 degree) J.Noirjean /12.05.2011

  10. Tuner Loop module • Designer J.Noirjean • Main electronics components: • Xilinx Virtex-5 • ADI SHARC DSP, 400 MHz • 2 x 72 Mbit SRAM • 4 x Dual ADI ADC, 125 MSPS, 14 bit • 2 x SerDestransceivres, 1.5 GBps • Dual DAC, 125 MSPS, 14 bits • 8 x RF Front-end channels, ENOB 11.04 bits J.Noirjean /12.05.2011

  11. Tuner loop control / DTL2-3 • Tuner Loop control acts on: • The tuner position • The phase shifter (communication over Ethernet) J.Noirjean /12.05.2011

  12. Tuner loop control / DTL2-3 Courtesy:N.Schwerg • Tuner Loop control acts on: • The tuner position • The phase shifter (communication over Ethernet) J.Noirjean /12.05.2011

  13. CavityLoop module • Designer G.Hagmann • Module beingdesigned for SPS 800MHz • Will beadapted for Linac4: • Lowlatency digital chips(ADC’s,andDAC’s) • Redesignedanalogfilters J.Noirjean /12.05.2011

  14. CavityLoop control/PIM5-12 • Cavityloopactson: • The RF drive to regulate the field in the cavities • The phaseshifterto balance the hybrid, compensating for itsasymmetry J.Noirjean /12.05.2011

  15. CavityLoop control/PIM5-12 Courtesy:N.Schwerg • Cavityloopacts on: • The RF drive to regulate the field in the cavities • The phaseshifter to balance the hybrid, compensating for itsasymmetry J.Noirjean /12.05.2011

  16. Switch & Limit module • DesigerG.Hagmann • Preventsfromdriving the klystron in saturation • Entry point for the High power RF interlock • Adaptedfrom SPS TWC 800MHz system for Linac4 purposes J.Noirjean /12.05.2011

  17. Thankyou for your attention J.Noirjean /12.05.2011

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