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This documentation provides insights into the configuration and readout of the Mini-2 system using DAQ Software. It covers the integration of GLIB version 3 and details the use of various protocols, including UDP and IPBus, to facilitate efficient data transfers. The setup includes analog digitization via FMC and emphasizes the role of MATLAB and Python GTK GUI for user interactions. With features like low overhead communication and automatic firmware updates, this software supports robust experimentation configurations suitable for high-performance applications in particle physics research.
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DAQ Software for Mini-2 Kenneth Johns, Charlie Armijo, Bill Hart, Karen Palmer, Sarah Jones, Kayla Niu, Jonathan Snavely, Dan Tompkins University of Arizona
Configuration and Readoutof Mini-2 using GLIB ver. 3 OTS FMC is used to digitize analog VMM data miniSAScables and SMA cables Custom S6-FMC Mini-2, containing 1 VMM ASIC SFP+ GbE (UDP packets) PCIe IPBus via μTCA (UDP packets) The Virtex 6 contains the logic to configure and readout the VMM GbE (RJ-45) IN: Configuration String and Commands OUT: UDP packets to MATLAB
DAQ Software for Mini-2 • IPBus1.3 • Works as fabric for GLIB v3 Firmware System Core – Wishbone • No overall IPBus packet header • Works with PyChips which is no longer supported • UDP • Low overhead • Easy to build client/server in software • Packets can be received out of order and/or lost • Use firmware to build UDP packets or use Microblaze • Matlab • Works well with UDP packets • Easy to set up Runnable Histograms
DAQ Software for Mini-2 • Configuration is via Python GTK gui using PyChips. • Transactions with registers via IPBus/Wishbone bridge
GLIB ver. 3 Firmware Architecture With IPBus 1.3 and PyChips
DAQ Software for Mini-2 • IPBus2.xA Better UDP protocol • Combined Firmware and Software • Uses UDP w/ IPBus 32bit header* • Packet numbering, etc. • Better than UDP alone with less overhead than TCP • Requires RARP (Reverse Address Resolution Protocol) • Software updates are automatically downloaded • Requires a non-trivial rebuild of the GLIB v.3 Firmware System Core • Firmware examples for other Xilinx boards exist • Appears to be the future for ATLAS
DAQ Software for Mini-2 IPBus Packet Header IPBus Packet Type Transaction Header
IPBus 2.x GLIB Virtex 6 Pinout (.ucf) NET gt_clkp LOC=M6 | DIFF_TERM=TRUE | TNM_NET=gtpclk; NET gt_clkn LOC=M5 | DIFF_TERM=TRUE; -- MGTREFCLK1, Bank 115 -- LVDS CLK INST eth/*/gtxe1_i LOC=GTXE1_X0Y9; -- V1, V2, W3, W4 -- PCIe pins, Bank 114 NET leds<0> LOC=AF31 | IOSTANDARD=LVCMOS25; -- on NET leds<1> LOC=AB25 | IOSTANDARD=LVCMOS25; -- heartbeat NET leds<2> LOC=AC25 | IOSTANDARD=LVCMOS25; -- off # interface between FPGA and CPLD NET "v6_cpld[0]" LOC = AE32 ; # IO_L14N_VREF_13 NET "v6_cpld[1]" LOC = AB27 ; # IO_L15P_13 NET "v6_cpld[2]" LOC = AC27 ; # IO_L15N_13 NET "v6_cpld[3]" LOC = AG33 ; # IO_L16P_13 NET "v6_cpld[4]" LOC = AG32 ; # IO_L16N_13 NET "v6_cpld[5]" LOC = AA26 ; # IO_L17P_13
GLIB ver. 3 Firmware Architecture With IPBus 1.3 and PyChips With IPBus 2.x 12/21/2013 9
DAQ Software for Mini-2 • One can use Xilinx V7 or K7 boards in place of the GLIB (Virtex 6) • Output data are UDP packets over GbE • Readout software options • MATLAB (AZ) • QT (G. Iakovidis/NTUA) • LabVIEW (BNL?)