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Understanding Memory Hierarchy: Principles, Trends, and Design in Modern Processors

This chapter delves into the memory hierarchy, exploring the critical role it plays in processor performance. It discusses the latency gap faced during cache misses and the importance of managing memory to optimize speed and efficiency. Key concepts such as cache hits and misses, associativity, and interleaving are analyzed along with technology trends shaping memory systems. The text outlines how different levels of memory interact and the trade-offs involved in their design, aiming to enhance cache performance and manage virtual memory effectively.

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Understanding Memory Hierarchy: Principles, Trends, and Design in Modern Processors

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Presentation Transcript

  1. Chapter 7Memory Hierarchy

  2. Outline

  3. Technology Trends

  4. Processor Memory Latency Gap Time of a full cache miss in instructions executed • 1st Alpha: 340 ns/5.0 ns = 68 clks x 2 (136 instr.) • 2nd Alpha: 266 ns/3.3 ns = 80 clks x 4 (320 instr.) • 3rd Alpha: 180 ns/1.7 ns =108 clks x 6 (648 instr.)

  5. Solution: Memory Hierarchy Speed: Fastest Slowest Size: Smallest Biggest Cost: Highest Lowest

  6. Memory Hierarchy: Principle

  7. Why Hierarchy Works?

  8. How Does It Work? Speed (ns): 1’s 10’s 100’s 10,000,000’s 10,000,000,000’s (10’s ms) (10’s sec) Size(bytes): 100’s K’s M’s G’s T’s

  9. How Is the Hierarchy Managed?

  10. Memory Hierarchy Technology

  11. Memory Hierarchy Technology

  12. Memory Hierarchy: Terminology

  13. 4 Questions for Hierarchy Design

  14. Memory System Design

  15. Summary of Memory Hierarchy

  16. Outline

  17. Basics of Cache

  18. Hits and Misses

  19. Hits and Misses

  20. Avoid Waiting for Memoryin Write Through

  21. Exploiting Spatial Locality

  22. Block Size Block Size Tradeoff

  23. Memory Design to Support Cache

  24. Interleaving for Bandwidth

  25. Cache Performance

  26. Improving Cache Performance

  27. Reduce Miss Ratio with Associativity

  28. Set-Associative Cache

  29. Possible Associativity Structures

  30. Block Placement

  31. Data Placement Policy

  32. Cache Block Replacement

  33. Comparing the Structures

  34. A 4-Way Set-Associative Cache

  35. Reduce Miss Penalty with Multilevel Caches

  36. Sources of Cache Misses

  37. Cache Design Space

  38. Cache Summary

  39. Outline

  40. Virtual Memory

  41. Virtual Memory

  42. Why Virtual Memory?

  43. Basic Issues in Virtual Memory

  44. Paging

  45. Key Decisions in Paging

  46. Choosing the Page Size

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